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* ddr: altera: Repair DQ window centering codeMarek Vasut2016-04-20-8/+7
| | | | | | | | | | | | The code uses a lot of signed numbers, which ended up in variables of unsigned type, which resulted in all sorts of underflows. This in turn caused incorrect calibration on certain boards. Moreover, repair the readout of the DQ delay, which was being pulled from wrong register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Staticize global variablesMarek Vasut2016-04-20-4/+4
| | | | | | | | | Just staticize global variables in sequencer, since there is no point in having these symbols available outside of the DDR code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut2016-04-20-66/+66
| | | | | | | | | | | | Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut2016-04-20-3/+13
| | | | | | | | | This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Remove unnecessary ODT mode configMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | There is no point in resetting the ODT setting if the write test failed, since the code will always retry the calibration and thus reconfigure the ODT anyway OR the code will fail calibration and halt. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Remove unnecessary update of the SCCMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is followed by SCC manager update. Moreover, only this function triggers the SCC manager update internally. Thus, remove the internal invocation to avoid triggering the update twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Fix DRAM end value in protection ruleMarek Vasut2016-04-20-1/+1
| | | | | | | | | | The hi address bitfield in the protection rule must be set to the last address in the region which the rule represents. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut2016-04-20-1/+1
| | | | | | | | | | The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Tweak DQS tracking enable handlingMarek Vasut2016-04-20-2/+5
| | | | | | | | | | In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Replace ad-hoc constant with macroMarek Vasut2016-04-20-2/+2
| | | | | | | | | The bit 22 is in fact DQS tracking enable bit (dqstrken) and there is a macro for this bit already, so use it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-16-0/+1
| | | | | | | | | | Init the rule ID, otherwise the debug code will always dump the protection settings entry 0. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com>
* ddr: altera: Repair uninited variableMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | Fix the following problem: drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full': drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized] if (found_passing_read && found_failing_read) ^ drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here u32 found_passing_read, found_failing_read, initial_failing_dtap; ^ Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | | | | This gem is really really rare, there was an actual float used in the Altera DDR init code, which pulled in floating point ops from the libgcc, just wow. Since we don't support floating point operations the same way Linux does not support them, replace this with an integer multiplication and division combo. This removes some 2kiB of size from the SPL as the floating point ops are no longer pulled in from libgcc. This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which does not contain the floating point bits. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sequencer: Clean checkpatch issuesMarek Vasut2015-08-08-71/+88
| | | | | | | | | Fix most of the dangling checkpatch issues, no functional change. There are still 7 warnings, 1 checks , but those are left in place for the sake of readability of the code. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Clean data typesMarek Vasut2015-08-08-48/+48
| | | | | | | Replace uintNN_t with uNN. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Pluck out misc macros from codeMarek Vasut2015-08-08-22/+15
| | | | | | | | | | | | | Actually convert the sequencer code to use socfpga_sdram_misc_config instead of the various macros. This is just an sed exercise here, no manual coding needed. This patch actually removes the need to include any board-specific files in sequencer.c , so sequencer.c namespace is now no longer poluted by QTS-generated macros. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VALMarek Vasut2015-08-08-49/+4
| | | | | | | | | This is another macro used to obfuscate the real code. The T(INIT|RESET)_CNTR._VAL is always defined, so this indirection is unnecessary. Get rid of this. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Zap VFIFO_SIZEMarek Vasut2015-08-08-7/+4
| | | | | | | Just use READ_VALID_FIFO_SIZE directly, no need for this macro obfuscation. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut2015-08-08-0/+2
| | | | | | | | | | | Introduce structure socfpga_sdram_misc_config to wrap the remaining misc configuration values in board file. Again, introduce a function, socfpga_get_sdram_misc_config(), which returns this the structure. This is almost the final step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Pluck out IO_* macros from codeMarek Vasut2015-08-08-101/+100
| | | | | | | | | Actually convert the sequencer code to use socfpga_sdram_io_config instead of the IO_* macros. This is just an sed excercise here, no manual coding needed. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut2015-08-08-0/+2
| | | | | | | | | | | Introduce structure socfpga_sdram_io_config to wrap the IO configuration values in board file. Introduce socfpga_get_sdram_io_config() function, which returns this the structure. This is another step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Pluck out RW_MGR_* macros from codeMarek Vasut2015-08-08-154/+154
| | | | | | | | | Actually convert the sequencer code to use socfpga_sdram_rw_mgr_config instead of the RW_MGR_* macros. This is just an sed exercise here, no manual coding needed. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut2015-08-08-0/+4
| | | | | | | | | | | Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager configuration values in board file. Introduce a complementary function, socfpga_get_sdram_rwmgr_config(), which returns this the structure. This is another step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut2015-08-08-6/+8
| | | | | | | | | | Introduce two wrapper functions, socfpga_get_seq_ac_init() and socfpga_get_seq_inst_init() to avoid direct inclusion of the sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS generated files. This reduces namespace pollution again. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKSMarek Vasut2015-08-08-1/+0
| | | | | | | | This is defined in the QTS-generated headers, so it must not be re-defined in sequencer.h . Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Zap unused params and macrosMarek Vasut2015-08-08-75/+5
| | | | | | | | These parameters are not used in the code, zap them and the macros which are used by them as well. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Move qts-generated files to board dirMarek Vasut2015-08-08-605/+9
| | | | | | | | Move the files generated by QTS into the board directory, they should not be part of the driver files at all. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sdram: Make sdram_start and sdram_end into u32Marek Vasut2015-08-08-11/+12
| | | | | | | | | | | | | | | | Originally, both sdram_start and sdram_end were 64b values. The sdram_start had no reason for being so, since our address space is only 32b, so switching sdram_start to u32 is simple. The sdram_end is a bit more complex, since it can actually be set to (1 << 32) if someone really wanted to use an SoCFPGA with 4 GiB of DRAM and fixed the code around a little. But, the code handling the protection rules internally decrements the sdram_end variable anyway. Thus, instead of calling the code and passing in the address of the SDRAM end, pass in the address already decremented by one. This lets the sdram_end be 32b as well. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Minor cleanup in sdram_get_rule()Marek Vasut2015-08-08-4/+4
| | | | | | Fix the data types and zap unnecessary type change. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Minor cleanup in sdram_set_rule()Marek Vasut2015-08-08-4/+4
| | | | | | Zap an obscure unneeded cast and clean other minor nits in this function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Add missing kerneldocMarek Vasut2015-08-08-0/+12
| | | | | | | Add kerneldoc to functions which are missing it, but are already cleaned up. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_write_verify()Marek Vasut2015-08-08-25/+26
| | | | | | | | | Clean the function up so that it's obvious what it is doing, fix the formating strings in debug outputs, add kerneldoc. Make the function return proper errno-compliant return values and propagate this change throughout sdram.c Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_calculate_size() part 2Marek Vasut2015-08-08-23/+12
| | | | | | | | Clean up coding style, mostly clean up comments, add kerneldoc. Also, zap assignment of the "cs" variable, which is outright dead code, so just remove it. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_calculate_size() part 1Marek Vasut2015-08-08-9/+10
| | | | | | | | | Pluck out all of the CONFIG_HPS_SDR_CTRLCFG_* macros. This change makes sdram.c completely clear of these macros and allows removing of the ugly include of sdram.h . The namespace is now a much nicer place! Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Introduce socfpga_sdram_get_config()Marek Vasut2015-08-08-211/+5
| | | | | | | | | | Introduce socfpga_sdram_get_config() function implement in a board file, which returns the socfpga_sdram_config structure. This is the last step in cleaning up the socfpga_mmr_init_full(), but not the last step which allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c thus far. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8Marek Vasut2015-08-08-1/+2
| | | | | | Fix the return value so that standard errno return values can be used. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7Marek Vasut2015-08-08-1/+6
| | | | | | Add kerneldoc. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6Marek Vasut2015-08-08-10/+21
| | | | | | Pull out the block of register programming into a separate function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5Marek Vasut2015-08-08-10/+11
| | | | | | | | Rework remaining two register setting functions such that they only return the final register value. Move the register setting into the block of register I/O in sdram_mmr_init_full(). Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4Marek Vasut2015-08-08-62/+36
| | | | | | | | | Merge sdr_set_*() functions which are just setting registers among the sea of register setting in sdram_mmr_init_full(). There is no need to keep them separate this way, there is nothing special about them. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3Marek Vasut2015-08-08-28/+39
| | | | | | | Pluck out the remaining CONFIG_HPS_SDR_CTRLCFG_ and put it into the socfpga_sdram_config structure. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2Marek Vasut2015-08-08-67/+83
| | | | | | | | Suck out all the CONFIG_HPS_SDR_CTRLCFG_* from sdram_mmr_init_full() into the socfpga_sdram_config structure. There is still one ugly macro left behind, but this will be taken care of in subsequent patch. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1Marek Vasut2015-08-08-44/+0
| | | | | | | | Zap all the ad-hoc readbacks from the registers and other useless and broken debug output. This is really not useful and is only confusing. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Introduce socfpga_sdram_config() structureMarek Vasut2015-08-08-162/+179
| | | | | | | | | | | | Introduce this seemingly massive structure, which holds required values of all the registers of the SDRAM controller. The idea here is to avoid including the sdram.h header file, which is full of ad-hoc macros that polute the global namespace. Once the cleanup of sdram.c would be complete and all registers would be loaded from this new socfpga_sdram_config, a board file will only pass this structure into the sdram.c . This will hide all the horrors generated by QTS in the board directory. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_mp_threshold()Marek Vasut2015-08-08-13/+11
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_mp_pacing()Marek Vasut2015-08-08-21/+16
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_mp_weight()Marek Vasut2015-08-08-21/+16
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_fifo_cfg()Marek Vasut2015-08-08-7/+7
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_static_cfg()Marek Vasut2015-08-08-8/+7
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up set_sdr_addr_rw()Marek Vasut2015-08-08-20/+10
| | | | | | | Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-11-02 17:18:44 +0000