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path: root/drivers/clk/clk_rk3288.c
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* rockchip: spl: Support full-speed CPU in SPLSimon Glass2016-01-21-0/+56
| | | | | | | | Add a feature which speeds up the CPU to full speed in SPL to minimise boot time. This is only supported for certain boards (at present only jerry). Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: rk3288: clock: Fix various minor errorsSimon Glass2016-01-21-8/+13
| | | | | | Fix a number of small errors which were found in reviewing the clock code. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clk: Add support for clocks needed by the displaysSimon Glass2016-01-21-4/+170
| | | | | | | The displays need to use NPLL and also select some new peripheral clocks. Add support for these to the clock driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Rename the CRU_MODE_CON fieldsSimon Glass2016-01-21-30/+9
| | | | | | These should match the datasheet naming. Adjust them. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clk: Make rkclk_get_clk() SoC-specificSimon Glass2016-01-21-0/+13
| | | | | | | | | | | | The current method assumes that clocks are numbered from 0 and we can determine a clock by its number. It is safer to use an ID in the clock's platform data to avoid the situation where another clock is bound before the one we expect. Move the existing code into rk3036 since it still works there. Add a new implementation for rk3288. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: mmc: Update the driver to use the new clock IDSimon Glass2016-01-21-1/+1
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clock: Add a function to find a clock by IDSimon Glass2016-01-21-2/+22
| | | | | | | | The current approach of using uclass_get_device() is error-prone. Another clock (for example a fixed-clock) may cause it to break. Add a function that does a proper search. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clk: Add a function to get a peripheral clock rateSimon Glass2016-01-21-0/+37
| | | | | | | It is useful to be able to read the rate of a peripheral clock. Add a handler for that. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clock: Rename the general clock variable to gclk_rateSimon Glass2016-01-21-12/+12
| | | | | | The current name is confusing and a bit verbose. Rename it. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Use a separate clock ID for clocksSimon Glass2016-01-21-28/+35
| | | | | | | | | | At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
* clk: add static qualifier to local functionsMasahiro Yamada2016-01-20-1/+1
| | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: rk3288: Add clock driverSimon Glass2015-09-02-0/+618
Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3288. Signed-off-by: Simon Glass <sjg@chromium.org>
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