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* ahci: extend data io wait to 10sMark Langsdorf2015-06-12-1/+1
| | | | | | | | | | | The AHCI driver currently waits 5s before timing out when sending a data command to a drive. Some drives take upwards of 8s to respond to the initial data command while they're spinning up. Increase the data io timeout to 10s so that those drives can be found on initial scsi scan. Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de>
* ahci: support LBA48 data reads for 2+TB drivesMark Langsdorf2015-06-12-9/+29
| | | | | | | | | | | | | | Enable full 48-bit LBA48 data reads by passing the upper word of the LBA block pointer in bytes 9 and 10 of the FIS. This allows uboot to load data from any arbitrary sector on a drive with 2 or more TB of available data connected to an AHCI controller. Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de> [trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop warnings on platforms that don't enable that feature ] Signed-off-by: Tom Rini <trini@konsulko.com>
* fsl/sata: Replace sprintf() with snprintf()Tang Yuantian2015-05-28-1/+1
| | | | | | | | Function 'sprintf' does not check buffer boundaries but outputs to the buffer of fixed size which could potentially cause buffer overflow. Use a safer function to replace it. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
* ahci: mmio_base is a virtual addressScott Wood2015-04-18-6/+7
| | | | | | | | | | | | | | Don't store it in a u32. Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")). Fixes crash on boot in MPC8641HPCN_36BIT target. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Vadim Bendebury <vbendeb@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
* ahci: Fix a wrong parameter passTang Yuantian2015-04-07-1/+1
| | | | | | | | | | | | In stead of user_buffer_size, transfer_size should be used to pass to ahci_device_data_io(). transfer_size is the length that we want the low level function to transfer each time. If we use user_buffer_size which is the totally data length as parameter, low level function will actually create many SGs to transfer as many data as possible each time. That will produce many redundant data transfer. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: ahci: Make sure interface is not busy after enabling the portBin Meng2015-01-23-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each time U-Boot boots on Intel Crown Bay board, the displayed hard drive information is wrong. It could be either wrong capacity or just a 'Capacity: not available' message. After enabling the debug switch, we can see the scsi inquiry command did not execute successfully. However, doing a 'scsi scan' in the U-Boot shell does not expose this issue. SCSI: Target spinup took 0 ms. SATA link 1 timeout. AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... ahci_device_data_io: 0 byte transferred. <--- scsi inquiry fails ahci_device_data_io: 512 byte transferred. ahci_device_data_io: 512 byte transferred. ahci_device_data_io: 512 byte transferred. Device 0: (0:0) Vendor: ATA Prod.: Rev: ?8 Type: Hard Disk Capacity: 912968.3 MB = 891.5 GB (1869759264 x 512) Found 1 device(s). So uninitialized contents on the stack were passed to dev_print() to display those wrong information. The symptom were observed on two hard drives (one is Seagate, the other one is Western Digital). The fix is to make sure the AHCI interface is not busy by checking the error and status information from task file register after enabling the port in ahci_port_start() before proceeding other operations like scsi_scan(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ahci-plat: provide a weak scsi_bus_reset() hookDmitry Lifshitz2015-01-05-2/+1
| | | | | | | This allow the platform to handle a custom reset sequence. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
* ahci: introduce ahci_reset()Dmitry Lifshitz2015-01-05-17/+30
| | | | | | | | Extract controller reset code from ahci_host_init() into separate ahci_reset(). Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-12-10-6/+8
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| * sata: fix reset_sata for dwc_ahsataSoeren Moch2014-12-01-6/+8
| | | | | | | | | | | | | | | | | | | | | | - fix crash when sata device is not initialized - remove disable_sata_clock() since it is not clear which clock for which device should be disabled here - call disable_sata_clock() for mx6 in preboot_os instead Signed-off-by: Soeren Moch <smoch@web.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
* | blackfin: include <linux/compiler.h> rather than define __iomemMasahiro Yamada2014-12-08-1/+0
|/ | | | | | | | The macro __iomem is defined in include/linux/compiler.h. Let's include it rather than double __iomem defines. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.adi@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-24-0/+51
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| * sata: implement reset_sata for dwc_ahsataNikita Kiryanov2014-11-24-0/+51
| | | | | | | | | | | | | | | | | | | | | | Add reset_sata() to the sata driver interface and implement it for dwc_ahsata. This function cleans up after sata_init(), and therefore accepts a device number like sata_init() does. A dummy implementation is provided for the rest of the drivers. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
* | sata: fix a bug in init_sata() for pci-sata cardli pengbo2014-11-23-1/+1
| | | | | | | | | | | | | | | | | | Except the first loop, init_sata() should return 0 instead of 1 in the others. This patch fix the issue of the 2nd sata port not workable on pci-sata card. Signed-off-by: Pengbo Li <Pengbo.Li@freescale.com>
* | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-1/+1
|/ | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* dwc_ahsata: use bitwise operator in sata_port_statusNikita Kiryanov2014-10-28-1/+1
| | | | | | | | | | The logic of the return statement in sata_port_status() calls for a bitwise 'AND' operator, not logical 'AND'. Fix the typo. Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* arm: marvell: Move arch/kirkwood.h to arch/soc.hStefan Roese2014-10-23-1/+1
| | | | | | | | | This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* ahci: Don't start command DMA engine before buffers are setRoger Quadros2014-10-10-1/+0
| | | | | | | | | | | | The DMA/FIS buffers are set in ahci_port_start() which is called after ahci_host_init(). So don't start the DMA engine here (i.e. don't set FIS_RX) This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x) WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358() 44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access Signed-off-by: Roger Quadros <rogerq@ti.com>
* kconfig: add blank Kconfig filesMasahiro Yamada2014-09-24-0/+0
| | | | | | | | This would be useful to start moving various config options. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* sata: dwc_ahsata: implement sata_port_statusNikita Kiryanov2014-09-09-0/+17
| | | | | | | | | | | | Define the new common function sata_port_status() which can be used to query the sata driver for the state of ports, and implement it for dwc_ahsata. Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* ahci: provide sunxi SATA driver using AHCI platform frameworkIan Campbell2014-07-31-0/+16
| | | | | | | | | | | | | | | | | | | | | This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* AHCI: Increase link timeout to 200msIan Campbell2014-07-22-1/+1
| | | | | | | | | | | | | In 73545f75b66d "ahci: wait longer for link" I increased the timeout to 40ms based on the observed behaviour of a WD disk on a Cubietruck. Since then Karsten Merker and myself have both observed timeouts with HGST disks (Karsten on Cubietruck, me on Cubieboard2). Increasing the timeout to ~175ms fixes this, so go to 200ms for a bit of headroom. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Karsten Merker <merker@debian.org> Acked-by: Hans de Goede <hdegoede@redhat.com>
* dwc_ahsata: return failure for MX6 if not IMX6Q/IMX6DTim Harvey2014-06-06-0/+5
| | | | | | | The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return failure instead of attempting a memory access that results in a data abort and reset. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* ahci: Fix data abort on multiple scsi resets.Roger Quadros2014-04-02-7/+16
| | | | | | | | | | | | | | | | | | | Commit 2faf5fb82ed6 introduced a regression that causes a data abort when running scsi init followed by scsi reset. There are 2 problems with the original commit 1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is assigned to ataid[port] and used by other functions. 2) The function ata_scsiop_inquiry() tries to free memory which was never allocated on the heap. Fix these problems by using tmpid as a temporary cache aligned buffer. Allocate memory separately for ataid[port] and re-use it if required. Fixes: 2faf5fb82ed6 (ahci: Fix cache align error messages) Reported-by: Eli Nidam <elini@marvell.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* ahci: wait longer for link.Ian Campbell2014-03-10-1/+1
| | | | | | | | | | | | I have observed timeouts on a cubietruck. The increase to 40ms is completely arbitrary and Works For Me(tm). I couldn't find a good reference for how long you are supposed to wait, although googling around it seems like tens of ms rather than single digits is more common. I don't think there is any harm in waiting a bit longer. Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
* ahci-plat: Provide a weak scsi_init hookIan Campbell2014-03-10-0/+5
| | | | | | This allow the platform to register the platform ahci device. Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
* blackfin: Add <asm/clock.h> to numerous driversTom Rini2014-02-20-0/+1
| | | | | | | | | With d6a320d we moved some clock externs out of blackfin_local.h and into clock.h but now need to include <asm/clock.h> in more drivers to avoid warnings. Cc: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Tom Rini <trini@ti.com>
* sandbox: block driver using host file/device as backing storeHenrik Nordström2014-01-08-0/+125
| | | | | | | | | | | | | | | | | | | Provide a way to use any host file or device as a block device in U-Boot. This can be used to provide filesystem access within U-Boot to an ext2 image file on the host, for example. The support is plumbed into the filesystem and partition interfaces. We don't want to print a message in the driver every time we find a missing device. Pass the information back to the caller where a message can be printed if desired. Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Simon Glass <sjg@chromium.org> - Removed change to part.c get_device_and_partition() Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* ahci: Fix cache align error messagesRoger Quadros2013-12-04-7/+1
| | | | | | | | | | | | Align the ATA ID buffer to the cache-line boundary. This gets rid of the below error mesages on ARM v7 platforms. scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818 CC: Aneesh V <aneesh@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* ahci: Error out with message on malloc() failureRoger Quadros2013-12-04-2/+14
| | | | | | | | | If malloc() fails, we don't want to continue in ahci_init() and ahci_init_one(). Also print a more informative error message on malloc() failures. CC: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* drivers: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-37/+15
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Fix some obvious typos across multiple subsystems.Robert P. J. Day2013-09-20-1/+1
| | | | | | | | | | Typoes fixed: "partion" -> "partition" "retrive", "retreive" -> "retrieve" "th" -> "to" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* ahci: convert to use libata functions and definitionsRob Herring2013-09-06-56/+24
| | | | | | | | | | | | | libata already has similar functions as implemented in the ahci code. Refactor the code to use the libata variants and remove the dependency on ata.h. Convert some defines to use the version from libata.h. Also, remove some unnecessary memset's of bss data. This is a step toward hopefully merging ahci.c and dw_ahsata.c which are essentially the same driver. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* ahci: increase spin-up timeout to 20 secRob Herring2013-09-06-1/+1
| | | | | | | | Based on Linux libata code, most drives are less than 10 sec, but some need up to 20 sec. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* ahci: handle COMINIT received during spin-upRob Herring2013-09-06-0/+12
| | | | | | | Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes the link to go down and we need to re-initialize the link. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ahci: move link bring-up handling to separate functionRob Herring2013-09-06-15/+25
| | | | | | | | Move the link bring-up handling to a separate weak function in order to allow platforms to override it. This is needed on highbank platform which needs special phy handling. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ahci: add defines for PORT_SCR_STAT register bitsRob Herring2013-09-06-2/+3
| | | | | | | Replace hard-coded register values with proper defines for PORT_SCR_STAT register. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ahci: fix memory leak in ata_scsiop_inquiryRob Herring2013-09-06-0/+1
| | | | | | | This fixes a memory leak when scsi inquiry fails. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* ahci: fix unaligned accessRob Herring2013-09-06-1/+1
| | | | | | | | gcc 4.7 will generate unaligned accesses to local char arrays, so make them static to avoid that. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* ahci: use ports implemented map instead of num_portsRichard Gibbs2013-09-06-0/+4
| | | | | | | | | The AHCI driver was incorrectly using the Capabilities register NP (number of ports) field to determine which ports to activate. This commit changes it to correctly use the PORTS_IMPL register as a port map. Signed-off-by: Richard Gibbs <richard.gibbs@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-1/+1
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| * block: constify sect_buf argument of ide_write_dataGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a const keyword to the sect_buf argument of ide_write_data to fix the following warning: cmd_ide.c: In function '__ide_output_data': cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type /devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *' Also modify the driver-model documentation to match with the new prototype. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-307/+21
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* dwc_ahsata: Allow use with dcache enabledEric Nelson2013-06-26-9/+25
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* part/dev_desc: Add log2 of blocksize to block_dev_desc data structEgbert Eich2013-05-01-0/+4
| | | | | | | | | | log2 of the device block size serves as the shift value used to calculate the block number to read in file systems when implementing avaiable block sizes. It is needed quite often in file systems thus it is pre-calculated and stored in the block device descriptor. Signed-off-by: Egbert Eich <eich@suse.com>
* Consolidate bool typeYork Sun2013-04-01-34/+27
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* mvsata_ide.c: Correction of typo in commentsGray Remlin2013-03-11-2/+2
| | | | Signed-off-by: Gray Remlin <gryrmln@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2013-02-04-2/+2
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| * block: systemace: Added missing "else" in "ace_writew"Alexey Brodkin2013-02-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System ACE compact flash controller supports either 8-bit (default) or 16-bit data transfers. And in corresponding driver we need to implement read/write of 16-bit data words properly for both modes of operation. In existing code if width==8 both branches get executed which may cause unexpected behavior of SystemAce controller. Addition of "else" fixes described issue and execution is done as expected for both (8-bit and 16-bit) data bus widths. Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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