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* powerpc: P2010: Drop configuration for P2010York Sun2016-11-23-2/+0
| | | | | | | P2010 is a single-core version of P2020. There is no P2010 target configured. Drop related macros. P2010 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1014: Drop configuration for P1014York Sun2016-11-23-1/+0
| | | | | | | P1014 is a variant of P1010. There is no P1014 target configured. Drop related macros. P1014 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1013: Drop configuration for P1013York Sun2016-11-23-2/+0
| | | | | | | P1013 is a single-core version of P1022. There is no P1022 target configured. Drop related macros. P1022 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1012: Drop configuration for P1012York Sun2016-11-23-1/+0
| | | | | | | P1012 is a single-core version of P1021. There is no P1012 target configured. Drop related macros. P1012 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8560ADS: Remove macro CONFIG_MPC8560ADSYork Sun2016-11-23-1/+0
| | | | | | This macro is no longer used. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8540ADS: Remove macro CONFIG_MPC8540ADSYork Sun2016-11-23-1/+0
| | | | | | This macro is no longer used. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: mpc8540: Remove macro CONFIG_MPC8540York Sun2016-11-23-1/+1
| | | | | | | Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* x86: Enable EFI loader supportSimon Glass2016-11-14-1/+0
| | | | | | | | | | | | | | | | | | | | | Enable this so that EFI applications (notably grub) can be run under U-Boot on x86 platforms. At present the 'hello world' EFI application is not supported for the qemu-x86_efi_payload64 board. That board builds a payload consisting of a 64-bit header and a 32-bit U-Boot, which is incompatible with the way the EFI loader builds its EFI application. The following error is obtained: x86_64-linux-ld.bfd: i386 architecture of input file `lib/efi_loader/helloworld.o' is incompatible with i386:x86-64 output This could be corrected with additional Makefile rules. For now, this feature is disabled for that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [agraf: drop hello kconfig bits] Signed-off-by: Alexander Graf <agraf@suse.de>
* efi: Add support for a hello world test programSimon Glass2016-11-14-0/+14
| | | | | | | | | It is useful to have a basic sanity check for EFI loader support. Add a 'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> [agraf: Fix documentation, add unfulfilled kconfig dep] Signed-off-by: Alexander Graf <agraf@suse.de>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-11-07-0/+166
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| * dt: net: add DWC EQoS bindingStephen Warren2016-11-07-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Synopsys DWC EQoS is a configurable Ethernet MAC/DMA IP block which supports multiple options for bus type, clocking and reset structure, and feature list. This patch imports the binding from the Linux kernel, including my V3 patch to extend the binding to cover the Tegra186, which is applied for next-20160912. So far, my changes have been acked by Lars Persson, the original author of the binding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | mkimage: Allow including a ramdisk in FIT auto modeTomeu Vizoso2016-11-06-0/+4
|/ | | | | | | | | | | | | | | Adds -i option that allows specifying a ramdisk file to be added to the FIT image when we are using the automatic FIT mode (no ITS file). This makes adding Depthcharge support to LAVA much more convenient, as no additional configuration files need to be kept around in the machine that dispatches jobs to the boards. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Simon Glass <sjg@chromium.org> Cc: Matt Hart <matthew.hart@linaro.org> Cc: Neil Williams <codehelp@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* doc: update README.arm64Andre Przywara2016-11-05-10/+17
| | | | | | | This file apparently hasn't seen an update in a while, so just sync it with reality. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* rockchip: doc: add GPT partition layoutJacob Chen2016-10-30-2/+9
| | | | | | | A simple introduction. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* MAINTAINERS: Update Jagan's emailJagan Teki2016-10-29-1/+1
| | | | Signed-off-by: Jagan Teki <jagan@openedev.com>
* ARM: uniphier: update doc/README.uniphierMasahiro Yamada2016-10-18-31/+27
| | | | | | | | | | | - Rephrase the toolchains section. Leave only Linaro toolchains since it is the most tested these days. - Add build instruction for ARMv8 SoC boards - Add information about "ddrmphy" command Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: sync DT with latest LinuxMasahiro Yamada2016-10-18-16/+16
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* x86: coreboot: Convert to use DM coreboot video driverBin Meng2016-10-12-0/+4
| | | | | | | This converts coreboot to use DM framebuffer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: doc: Correct qfw command exampleBin Meng2016-10-12-1/+1
| | | | | | | The kernel load address for zboot should be 0x1000000. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: doc: Document coreboot framebuffer driver issue on QEMUBin Meng2016-10-12-0/+3
| | | | | | | | | For some unknown reason, coreboot framebuffer driver never works on QEMU since day 1. It seems the driver only works on real hardware. Document this issue. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-10-08-1/+26
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| * power: pmic: add Ricoh RN5T567 PMIC supportStefan Agner2016-10-07-0/+17
| | | | | | | | | | | | | | | | Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: imx: serial: support device treeStefan Agner2016-10-07-0/+8
| | | | | | | | | | | | | | | | Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * README.imx6: Fix Boundary Devices nameFabio Estevam2016-10-04-1/+1
| | | | | | | | | | | | Correct name is "Boundary Devices". Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | doc: typo fix addess -> addressJelle van der Waa2016-10-06-1/+1
| | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
* | README: Fix CONFIG_SYS_NAND_MAX_DEVICE typoSimon Glass2016-10-06-1/+1
| | | | | | | | | | | | | | | | | | This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | README: Drop CONFIG_MPC8349ADSSimon Glass2016-10-06-1/+0
| | | | | | | | | | | | | | | | This option is not used now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | README: Drop README.imx31Simon Glass2016-10-06-29/+0
| | | | | | | | | | | | | | | | | | The only content of this file is CONFIG options which are no-longer present in U-Boot. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | atmel: Drop README.at91-socSimon Glass2016-10-06-48/+0
| | | | | | | | | | | | | | | | | | | | This issue covered by this doc appears to be fixed, so let's remove the README. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> Acked-by: Andreas Bießmann <andreas@biessmann.org>
* | README: Drop unused JFFS2 optionsSimon Glass2016-10-06-58/+5
|/ | | | | | | | There appear to be neither implemented nor used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
* doc: Update info on using AM33xx secure devices from TIAndrew F. Davis2016-10-02-0/+32
| | | | | | | | | Add a section describing the additional boot types used on AM33xx secure devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* disk: part: refactor generic name creation for DOS and ISOPetr Kulhavy2016-10-01-0/+1
| | | | | | | | | | | | | In both DOS and ISO partition tables the same code to create partition name like "hda1" was repeated. Code moved to into a new function part_set_generic_name() in part.c and optimized. Added recognition of MMC and SD types, name is like "mmcsda1". Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fastboot: add support for writing MBRPetr Kulhavy2016-10-01-0/+37
| | | | | | | | | | | | Add special target "mbr" (otherwise configurable via CONFIG_FASTBOOT_MBR_NAME) to write MBR partition table. Partitions are now searched using the generic function which finds any partiiton by name. For MBR the partition names hda1, sda1, etc. are used. Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* boston: Introduce support for the MIPS Boston development boardPaul Burton2016-09-21-0/+58
| | | | | | | | | | This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* pxe: Modify README to add the description about FIT imageWenbin Song2016-09-07-6/+6
| | | | | | | | Use environment variable "kernel_addr_r" to indicate the location in RAM where FIT image will be stored. Use label command "kernel" to indicate which <path> the FIT image at. Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
* regulator: fixed: obey startup delayJohn Keeping2016-09-06-0/+1
| | | | | | | | | | When enabling a fixed regulator, it may take some time to rise to the correct voltage. If we do not delay here then subsequent operations will fail. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* treewide: fix "followings" to "following"Masahiro Yamada2016-08-26-1/+1
| | | | | | Most of them are my mistakes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* x86: Mention running U-Boot in 64-bit mode in the READMESimon Glass2016-08-16-0/+18
| | | | | | | | This feature is not supported. Document this, and add some details on how it might be implemented. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a reference to README.efiSimon Glass2016-08-16-0/+11
| | | | | | | | UEFI is commonly used on x86. Add a reference to U-Boot's support for this in the x86 README. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Mention how to boot a 64-bit kernel from U-BootSimon Glass2016-08-16-9/+9
| | | | | | | | The README indicates that this is not supported, but this is no-longer true. Update the text to indicate this and describe the FIT changes required. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: doc: Add note about the debug FSP usage on BayTrailStefan Roese2016-08-16-0/+4
| | | | | | | | | | | The debug FSP image is bigger in size than the normal FSP image. This patch adds a small description on how to use this FSP debug version by changing CONFIG_FSP_ADDR. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* xtensa: add support for the xtensa processor architecture [1/2]Chris Zankel2016-08-15-0/+97
| | | | | | | | | | | | | | The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* atmel: Bring in at91 pio4 device tree file and bindingsWenyou Yang2016-08-15-0/+66
| | | | | | | | Bring in required device tree file and bindings from Linux. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: atmel: DT binding for i2c driverSongjun Wu2016-08-15-0/+26
| | | | | | | | DT binding documentation for atmel i2c driver. Signed-off-by: Songjun Wu <songjun.wu@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* gpio: Add driver for TI PCF8575 I2C GPIO expanderVignesh R2016-08-08-0/+71
| | | | | | | | | | | | | | | | | | TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a 16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. The I/Os should be high before being used as inputs. Read the device documentation for more details[1]. This driver is based on pcf857x driver available in Linux v4.7 kernel. It supports basic reading and writing of gpio pins. [1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-06-4/+5
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| * rockchip: add support for rk3288 miniarm boardXu Ziyuan2016-08-05-4/+5
| | | | | | | | | | | | | | | | Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dt-bindings: add Tegra186 BPMP I2C bindingStephen Warren2016-08-04-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | dt-bindings: allow child nodes inside the Tegra BPMPStephen Warren2016-08-04-0/+23
| | | | | | | | | | | | | | | | | | | | The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: add BPMP DT bindingsStephen Warren2016-08-04-0/+81
| | | | | | | | | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-04 17:53:33 +0000