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* ARM: uniphier: add emmcupdate commandMasahiro Yamada2016-02-29-0/+14
| | | | | | | | | | | | The Boot ROM expects the boot image (SPL) in the Boot Partition 1. So, updating images involves the hardware partition switch. It might be a bit advanced for some users. To be user-friendly, this commit adds a useful command to update the images; just put SPL and U-Boot proper into the public directory of the TFTP server and execute "run emmcupdate" from the command line. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: uniphier: add driver for UniPhier SD/MMC host controllerMasahiro Yamada2016-02-29-0/+1
| | | | | | | Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* gpio: uniphier: add driver for UniPhier GPIO controllerMasahiro Yamada2016-02-29-0/+1
| | | | | | | This GPIO controller device is used on UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: Remove ARM dcc from the listMichal Simek2016-02-24-1/+0
| | | | | | | Remove ARM Debug communication channel driver from the list of not converted drivers to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* x86: doc: Update to include Intel Bayley Bay board instructionsBin Meng2016-02-21-16/+20
| | | | | | | | | | | Update existing documentation to mention Intel Bayley Bay board instructions, an additional Bay Trail based board to MinnowMax. This also adds a minor change to QEMU section to indicate clearly the instructions are for bare mode. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Add Intel Cougar Canyon 2 boardBin Meng2016-02-21-0/+21
| | | | | | | | | This adds basic support to Intel Cougar Canyon 2 board, a board based on Chief River platform with an Ivy Bridge processor and a Panther Point chipset. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Fix variable documented in README.distro for PXE address.Vagrant Cascadian2016-02-15-1/+1
| | | | | | | Fixes typo of pxe_addr_r with pxefile_addr_r. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: uniphier: update U-Boot file names in workflowMasahiro Yamada2016-02-14-3/+3
| | | | | | | | | | | | | | Since commit ad1ecd2063da ("fdt: Build a U-Boot binary without device tree") and commit 03c25bcd263a ("fdt: Build an SPL binary without device tree"), we can use shorter file names for the output images. The default configuration for UniPhier SoCs enables CONFIG_OF_SEPARATE and CONFIG_SPL_OF_CONTROL. In this case, spl/u-boot-spl.bin is the same as spl/u-boot-spl-dtb.bin. Likewise, u-boot.img is the same as as u-boot-dtb.img. So, this change of the flow has no impact. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* doc: Remove any reference to CONFIG_MODEM_SUPPORT, CONFIG_CMD_HWFLOW, ↵David Müller (ELSOFT AG)2016-02-08-72/+0
| | | | | | CONFIG_HWFLOW and friends from the documentation. Signed-off-by: David Müller <d.mueller@elsoft.ch>
* dm: Update on current serial driver statusSimon Glass2016-02-08-10/+4
| | | | | | Update the README to reflect the current status. Signed-off-by: Simon Glass <sjg@chromium.org>
* Use correct spelling of "U-Boot"Bin Meng2016-02-06-110/+110
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* mx6: soc: Add ENET2 mac address supportYe Li2016-02-02-1/+4
| | | | | | | The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li@nxp.com>
* drivers: serial: add driver for Microchip PIC32 UART controller.Paul Thacker2016-02-01-0/+5
| | | | | | | | | | This adds PIC32 UART controller support based on driver model. Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.Purna Chandra Mandal2016-02-01-0/+33
| | | | | | | | | | PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers and dividers capable of supplying clock to various controllers on or off-chip. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-29-0/+15
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| * distro bootcmd: enumerate PCI before network operationsStephen Warren2016-01-28-0/+8
| | | | | | | | | | | | | | | | | | The PCI bus must be enumerated before PCI devices, such as Ethernet devices, are known to U-Boot. Enhance the distro boot commands to perform PCI enumeration when needed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * distro bootcmd: make net boot only optionally start USBStephen Warren2016-01-28-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the distro boot commands always enumerate USB devices before performing network operations. However, depending on the board and end- user configuration, network devices may not be attached to USB, and so enumerating USB may not be necessary. Enhance the scripts to make this step optional, so that the user can decrease boot time if they don't need USB. This change is performed by moving the "usb start" invocation into a standalone variable. If the user desires, they can replace that variable's value with some no-op command such as "true" instead. Booting from a USB storage device always needs to enumerate USB devices, so this action is still hard-coded. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-01-28-7/+251
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| * net: phy: micrel: add documentation for Micrel KSZ90x1 bindingDinh Nguyen2016-01-28-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DTS documentation for the Micrel KSZ90x1 binding. The original document was from: [commit 4b405efbe12de28b26289282b431323d73992381 from the Linux kernel] This takes the original document and adds a clarification on how the skew values are represented in the code. References: Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014. http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014. http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: tsec: Use priv->tbiaddr to initialize TBI PHY addressBin Meng2016-01-28-0/+21
| | | | | | | | | | | | | | | | | | Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver, it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we can get this from device tree. Update the bindings doc as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * doc: dt-bindings: Describe Freescale TSEC ethernet controllerBin Meng2016-01-28-0/+43
| | | | | | | | | | | | | | | | Adapted from the same file name in the kernel device tree bindings documentation, to use with U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * drivers: net: vsc9953: Add LAG supportCodrin Ciubotariu2016-01-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | You can now configure LAG on VSC9953's ports using the command: ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>} A port must belong to a single LAG. By default, a port belongs to a LAG equal to the port's number. For each frame, a hash will be calculated based on Source/Destination MAC addresses, Source/Destination IP(v4/v6) addresses, Source/Destination ports. This hash will be used to select a single egress port from LAG. This also assures that frames from the same flow will always have the same egress port. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * doc: t1040-l2switch: Update READMECodrin Ciubotariu2016-01-28-7/+20
| | | | | | | | | | | | | | | | The driver for VSC9953 L2 switch IP supports many features and the documentation needs to be updated. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-28-2/+31
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| * | x86: baytrail: Add option to disable the internal UART to setup_early_uart()Stefan Roese2016-01-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a parameter to the function setup_early_uart() to either enable or disable the internal BayTrail legacy UART. Since the name setup_early_uart() does not match its functionality any more, lets rename it to setup_internal_uart() as well in this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: baytrail: Add documentation for FSP memory-down valuesStefan Roese2016-01-28-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the documentation for the memory-down parameters of the Intel FSP. To configure a board without SPD DDR DIMM but with onboard DDR chips. The values are taken from the coreboot header: src/soc/intel/fsp_baytrail/chip.h (git ID da1a70ea from 2016-01-16 as reference). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Andrew Bradford <andrew.bradford@kodakalaris.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | serial: uartlite: Move driver to DMMichal Simek2016-01-27-1/+13
|/ / | | | | | | | | | | | | Enable SPL DM too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
* | ns16550: replace with binding files from Linux kernelThomas Chou2016-01-25-10/+175
| | | | | | | | | | | | | | | | | | | | Replace ns16550.txt with binding files from Linux kernel. As suggested by Stephen Warren, we should keep the directory structure, filenames, and file content identical to the bindings in the Linux kernel. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | rockchip: Update the READMESimon Glass2016-01-21-20/+20
| | | | | | | | | | | | | | | | | | | | GPIO, I2C, LCD and HDMI are now implemented. We have more than one PMIC. There is an implementation to run the CPU at full speed although it does not seem to make much difference. Update the README to cover recent developments. Signed-off-by: Simon Glass <sjg@chromium.org>
* | rockchip: Add support for Raxda Rock 2Simon Glass2016-01-21-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | This board includes an RK3288 SoC on a SOM. It can be mounted on a base-board which provides a wide range of peripherals. So far this is verified to boot to a prompt from a microSD card. The serial console works as well as HDMI. Thanks to Tom Cubie for sending me a board. Signed-off-by: Simon Glass <sjg@chromium.org>
* | rockchip: Add a script to parse datasheetsSimon Glass2016-01-21-0/+6
| | | | | | | | | | | | | | | | This script has proved useful for parsing datasheets and creating register shift/mask values for use in header files. Include it in case it is useful for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dts: Bring in pinctrl device tree bindingSimon Glass2016-01-21-0/+236
| | | | | | | | | | | | Add this binding file since we now use it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: lpuart: Add driver model serial supportBin Meng2016-01-20-1/+0
| | | | | | | | | | | | | | | | This adds driver model support to lpuart serial driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Tested-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
* | dm: timer: uclass: add timer init in uclass driver to add timer deviceMugunthan V N2016-01-20-0/+43
| | | | | | | | | | | | | | | | | | | | Adding timer init function in timer-uclass driver to create and initialize the timer device on platforms where u-boot,dm-pre-reloc is not used. Since there will be multiple timer devices in the system, adding a tick-timer node in chosen node to know which timer device to be used as tick timer in u-boot. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov2016-01-19-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code which sets up 2-level page tables on ARM64 thus extending available VA space. CPUs implementing 64k translation granule are able to use direct PA-VA mapping of the whole 48 bit address space. It also adds the ability to reset the SCTRL register at the very beginning of execution to avoid interference from stale mappings set up by early firmware/loaders/etc. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-14-3/+31
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| * x86: qemu: add documentaion for the fw_cfg interfaceMiao Yan2016-01-13-3/+31
| | | | | | | | | | | | | | | | Document the usage of 'qfw' command Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | ARM: uniphier: fix recommended board setting in documentMasahiro Yamada2016-01-13-1/+1
|/ | | | | | | | | | | | The mem_is_flash() in arch/arm/mach-uniphier/micro-support_card.c writes/reads the tail of each NOR flash bank to check if the device really resides there. If CS1_SPLIT were enabled, the support card would always require two NOR flash devices to be inserted for the correct NOR detection. This is not probably what we want. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* rockchip: Fix the configuration for chromebook_jerrySimon Glass2016-01-08-3/+4
| | | | | | | | Various updates did not make it through to this board. Also the instructions for building a SPI image are no-longer correct. Fix these so that Jerry can boot to a prompt again. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-0/+51
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| * imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic2016-01-03-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
* | ARM: uniphier: rename rest of defconfig filesMasahiro Yamada2015-12-23-6/+6
| | | | | | | | | | | | | | Rename rest of defconfig files of UniPhier SoC family to have the prefix uniphier_. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: support ProXstream2, PH1-LD6b boards in single defconfigMasahiro Yamada2015-12-23-5/+9
| | | | | | | | | | | | | | | | These boards are similar enough to be supported in a single defconfig file. Distinguish one from another by "DEVICE_TREE" from the command line. The how-to-build in doc/README.uniphier should be also updated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: merge ph1_ld4_defconfig and ph1_sld8_defconfigMasahiro Yamada2015-12-23-6/+6
| | | | | | | | | | | | | | | | | | These two are similar enough to be merged into a single defconfig file. Distinguish one from another by "DEVICE_TREE" from the command line. The how-to-build in doc/README.uniphier should be also updated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | x86: Remove Graeme Russ from the git alias fileSimon Glass2015-12-21-2/+1
| | | | | | | | | | | | | | As requested, remove Graeme's email address. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* | serial-howto: remove altera_jtag_uart and altera_uart from the listThomas Chou2015-12-19-2/+0
| | | | | | | | | | | | | | | | Since both altera_jtag_uart and altera_uart are converted to driver model, remove them from the list of drivers remaining to convert. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Chin Liang See <clsee@altera.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-12-16-4/+4
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| * | rockchip: doc: add imagenameJeffy Chen2015-12-13-4/+4
| | | | | | | | | | | | | | | | | | | | | We now using imagename to select rockchip's spl hdr & spl size. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | stm32: Convert serial driver to DMKamil Lulko2015-12-12-1/+0
|/ / | | | | | | | | | | Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Fix typo: commmand -> command.Vagrant Cascadian2015-12-05-2/+2
| | | | | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.1 at 2024-11-05 07:57:18 +0000