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* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-05-30-1/+4
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| * x86: galileo: Enable ACPI table generationBin Meng2016-05-30-1/+4
| | | | | | | | | | | | | | Enable ACPI table generation by creating a DSDT table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-05-27-9/+46
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work. Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: lib/efi_loader/efi_disk.c Modified: configs/odroid-c2_defconfig
| * | Add a mailbox driver framework/uclassStephen Warren2016-05-26-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module. This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two. The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: allow setting driver_data before/during bindStephen Warren2016-05-26-9/+14
| |/ | | | | | | | | | | | | | | | | | | | | This will allow a driver's bind function to use the driver data. One example is the Tegra186 GPIO driver, which instantiates child devices for each of its GPIO ports, yet supports two different HW instances each with a different set of ports, and identified by the udevice_id .data field. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | doc: Add info on using secure devices from TIDaniel Allred2016-05-27-0/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds doc/README.ti-secure file to explain in generic terms how boot images need to be created for secure devices from Texas Instruments. Specific details for creating secure boot images for the AM43xx, DRA7xx and AM57xx secure devices from Texas Instruments are also provided in the README file. Secure devices require a security development package (SECDEV) package that can be downloaded from: http://www.ti.com/mysecuresoftware Login is required and access is granted under appropriate NDA and export control restrictions. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Remove/update old generic-board documentation and warningSimon Glass2016-05-27-68/+7
|/ | | | | | | | Remove the warning from the Makefile, since boards that do not use generic board will no longer build. Also update documentation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-05-24-0/+25
|\ | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/zynq_gem.c
| * net: phy: dp83867: Add device tree bindings and documentationDan Murphy2016-05-24-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver. The original document was from: [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-05-24-0/+70
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| * | mkimage: Report information about fpgaMichal Simek2016-05-24-0/+70
| |/ | | | | | | | | | | | | | | Add FIT_FPGA_PROP that user can identify an optional entry for fpga. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-05-23-25/+101
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| * x86: doc: Add porting hints for ACPI with WindowsBin Meng2016-05-23-0/+6
| | | | | | | | | | | | | | | | Windows might cache system information and only detect ACPI changes if you modify the ACPI table versions. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Mention Ubuntu/Windows installation and boot supportBin Meng2016-05-23-4/+8
| | | | | | | | | | | | | | | | As of now, U-Boot can support installing and booting Ubuntu/Windows with the help of SeaBIOS. Update the documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Update information about IGD with SeaBIOSBin Meng2016-05-23-0/+24
| | | | | | | | | | | | | | | | Document how to make SeaBIOS load and run the VGA ROM of Intel IGD device when loaded by U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: minnowmax: Adjust U-Boot environment address in SPI flashBin Meng2016-05-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently U-Boot environment address is at offset 0x7fe00 of a 8MB SPI flash. When creating a partial u-boot.rom image without flash descriptor and ME firmware, U-Boot actually occupies the last 1MB of the flash, and reprograming U-Boot causes previous environment settings get lost which is not convenient during testing. Adjust the environment address to 0x6ef000 instead (before the MRC cache data region in the flash). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Document ACPI supportBin Meng2016-05-23-1/+43
| | | | | | | | | | | | | | | | Remove ACPI from the TODO list and add a new section to document current ACPI support in U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Minor update for accuracyBin Meng2016-05-23-23/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the doc for the following places: - Mention CRB for Bayley Bay - Mention Congatec QEVAL 2.0 & conga-QA3/E3845 - Limit part of the QEMU paragraphs to 80 cols - Correct some typos (drive, it's, Ubuntu) - Add description for "console=ttyS0,115200" - Remove CONFIG_BOOTDELAY description which is already in x86-common.h Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: irq: Enable SCI on IRQ9Bin Meng2016-05-23-0/+5
| | | | | | | | | | | | | | | | | | | | By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
* | drivers: spi: add spi support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+19
| | | | | | | | | | | | | | | | This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | drivers: serial: add serial driver for ar933x SOCWills Wang2016-05-21-0/+24
|/ | | | | | | | | This patch add support for ar933x serial. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-6/+6
| | | | | | | | | | | | | Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
* Change my mailaddressAndreas Bießmann2016-05-02-3/+3
| | | | | | I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mkimage: fix argument parsing on BSD systemsAndreas Bießmann2016-05-02-3/+3
| | | | | | | | | | | The getopt(3) optstring '-' is a GNU extension which is not available on BSD systems like OS X. Remove this dependency by implementing argument parsing in another way. This will also change the lately introduced '-b' switch behaviour. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2016-04-26-4/+6
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| * odroid: Update README with correct firmware link and XU4 supportShawn Guo2016-04-14-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The firmware from link [1] only works with U-Boot image that is no bigger than 328KiB. Using it with the default mainline U-Boot today which is already around 500KiB is just not working. Correct the link to be hardkernel_1mb_uboot one [2], so that users can get mainline U-Boot work out of box. While at it, the README is updated to include XU4 support, like DTB file name. [1] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel [2] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot Signed-off-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | doc: Updated README.ext4Robert P. J. Day2016-04-18-27/+51
| | | | | | | | | | | | Clean up the ext4 README file. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | doc: driver-model: Update dm tests run using test.pyJagan Teki2016-04-14-101/+128
|/ | | | | | | | | | Since all the tests are implemented in pytest infrastructure, So update the dm tests with the same instead of ./test/dm/test-dm.sh Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* i2c: Describe Cadence I2C devicetree bindingsMoritz Fischer2016-04-13-0/+20
| | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-06-1/+1
| | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* Add myself as Snapdragon and SPMI maintainerMateusz Kulikowski2016-04-01-0/+3
| | | | | | | | - Update MAINTAINERS - Update git-mailrc Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* gpio: Add support for Qualcomm PM8916 gpiosMateusz Kulikowski2016-04-01-0/+48
| | | | | | | | | | | This driver supports GPIOs present on PM8916 PMIC. There are 2 device drivers inside: - GPIO driver (4 "generic" GPIOs) - Keypad driver that presents itself as GPIO with 2 inputs (power and reset) Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* pmic: Add support for Qualcomm PM8916 PMICMateusz Kulikowski2016-04-01-0/+18
| | | | | | | | This PMIC is connected on SPMI bus so needs SPMI support enabled. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* drivers: spmi: Add support for Qualcomm SPMI bus driverMateusz Kulikowski2016-04-01-0/+26
| | | | | | | | Support SPMI arbiter on Qualcomm Snapdragon devices. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* spmi: Add sandbox test driverMateusz Kulikowski2016-04-01-0/+31
| | | | | | | | This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ehci: Add support for Qualcomm EHCIMateusz Kulikowski2016-04-01-0/+10
| | | | | | | | | | This driver is able to reconfigure OTG controller into HOST mode. Board can add board-specific initialization as board_prepare_usb(). It requires USB_ULPI_VIEWPORT enabled in board configuration. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* mmc: Add support for Qualcomm SDHCI controllerMateusz Kulikowski2016-04-01-0/+25
| | | | | | | | | | | Add support for SD/eMMC controller present on some Qualcomm Snapdragon devices. This controller implements SDHCI 2.0 interface but requires vendor-specific initialization. Driver works in PIO mode as ADMA is not supported by U-Boot (yet). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* gpio: Add support for Qualcomm gpio controllerMateusz Kulikowski2016-04-01-0/+22
| | | | | | | | | | Add support for gpio controllers on Qualcomm Snapdragon devices. This devices are usually called Top Level Mode Multiplexing in Qualcomm documentation. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* serial: Add support for Qualcomm serial portMateusz Kulikowski2016-04-01-0/+6
| | | | | | | | | This driver works in "new" Data Mover UART mode, so will be compatible with modern Qualcomm chips only. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* doc: clarify openssl-based key and certificate generation processAndreas Dannenberg2016-04-01-4/+4
| | | | | | | | Add some basic clarification that the dev.key file generated by OpenSSL contains both the public and private key, and further highlight that the certificate generated here contains the public key only. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* doc: fix file extension for flattened image tree blobAndreas Dannenberg2016-04-01-1/+1
| | | | | | | | Different sections in the document suggest flattened image tree blob files have a file name extension of .itb. Fix the list of file extensions to reflect that. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* arm: clang: Update support slightlyTom Rini2016-04-01-8/+7
| | | | | | | | | | | - Move most of the flags required into LLVM_RELFLAGS to test at build time instead of requiring them to be passed in. - Update doc/README.clang to reflect this - Switch to rpi_2 as the example as it's closer to working out of the box than rpi is. Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Signed-off-by: Tom Rini <trini@konsulko.com>
* doc/README.clang: Document sandbox instructionsTom Rini2016-03-27-0/+4
| | | | | | | | It is possible to compile and run the sandbox target with clang currently, so document that as well. Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: switch to raw U-Boot imageMasahiro Yamada2016-03-24-6/+16
| | | | | | | | | | | | | | | | | Now everything is done to load a raw U-Boot proper image instead of an mkimage-processed one (as far as I tested on NAND, eMMC, NOR). The SPL already knows the load address of the U-Boot proper without parsing its uImage header because the load address is defined by CONFIG_SYS_TEXT_BASE, assuming that the two images are generated from the same build. My main motivation of this switch is to use u-boot-with-spl.bin, a concatenation of u-boot-spl.bin and u-boot.bin. (I wish there were a concatenation of u-boot-spl.bin and u-boot.img...) Anyway, this commit would be useful for one-shot image burn. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix README instruction for updating U-Boot via TFTPMasahiro Yamada2016-03-24-4/+4
| | | | | | | | | | Commit 3cb9abc9c512 ("ARM: uniphier: update U-Boot file names in workflow") missed to update these two sentences. Fix them now. Replace u-boot-spl-dtb.bin and u-boot-dtb.img with u-boot-spl.bin and u-boot.img, respectively. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Fix spelling of "transferred".Vagrant Cascadian2016-03-22-3/+3
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu2016-03-21-0/+9
| | | | | | | | | | Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* x86: Add support for the samus chromebookSimon Glass2016-03-17-0/+81
| | | | | | | | | | | | | | | | | | | | | | | This adds basic support for chromebook_samus. This is the 2015 Pixel and is based on an Intel broadwell platform. Supported so far are: - Serial - SPI flash - SDRAM init (with MRC cache) - SATA - Video (on the internal LCD panel) - Keyboard Various less-visible drivers are provided to make the above work (e.g. PCH, power control and LPC). The platform requires various binary blobs which are documented in the README. The major missing feature is USB3 since the existing U-Boot support does not work correctly with Intel XHCI controllers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Update README for new developmentsSimon Glass2016-03-17-3/+13
| | | | | | | Update a few points which have become out-of-date. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: broadwell: Add a pinctrl driverSimon Glass2016-03-17-0/+208
| | | | | | | | | | | GPIO pins need to be set up on start-up. Add a driver to provide this, configured from the device tree. The binding is slightly different from the existing ICH6 binding, since that is quite verbose. The new binding should be just as extensible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-11-06 07:31:35 +0000