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* nand: Introduce CONFIG_SYS_NAND_SELF_INITScott Wood2012-01-26-0/+62
| | | | | | | | | | | | | This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com>
* i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite boardJason Liu2012-01-16-0/+67
| | | | | | | | Add the initial support for Freescale i.MX6Q Sabre Lite board Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Eric Nelson <eric.nelson@boundarydevices.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-01-13-5/+74
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
| * sbc8548: enable support for hardware SPD errata workaroundPaul Gortmaker2012-01-11-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing boards by default have an issue where the LBC SDRAM SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51. After the hardware modification listed in the README is made, then the DDR2 SPD EEPROM appears at 0x53. So this implements a board specific get_spd() by taking advantage of the existing weak linkage, that 1st tries reading at 0x53 and then if that fails, it falls back to the old 0x51. Since the old dependency issue of "SPD implies no LBC SDRAM" gets removed with the hardware errata fix, remove that restriction in the code, so both LBC SDRAM and SPD can be selected. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * sbc8548: Make enabling SPD RAM configuration workPaul Gortmaker2012-01-11-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, SPD configuration of RAM was non functional on this board. Now that the root cause is known (an i2c address conflict), there is a simple end-user workaround - remove the old slower local bus 128MB module and then SPD detection on the main DDR2 memory module works fine. We make the enablement of the LBC SDRAM support conditional on being not SPD enabled. We can revisit this dependency as the hardware workaround becomes available. Turning off LBC SDRAM support revealed a couple implict dependencies in the tlb/law code that always expected an LBC SDRAM address. This has been tested with the default 256MB module, a 512MB a 1GB and a 2GB, of varying speeds, and the SPD autoconfiguration worked fine in all cases. The default configuration remains to go with the hard coded DDR config, so the default build will continue to work on boards where people don't bother to read the docs. But the advantage of going to the SPD config is that even the small default module gets configured for CL3 instead of CL4. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * sbc8548: enable ability to boot from alternate flashPaul Gortmaker2012-01-11-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has an 8MB soldered on flash, and a 64MB SODIMM flash module. Normally the board boots from the 8MB flash, but the hardware can be configured for booting from the 64MB flash as well by swapping CS0 and CS6. This can be handy for recovery purposes, or for supporting u-boot and VxBoot at the same time. To support this in u-boot, we need to have different BR0/OR0 and BR6/OR6 settings in place for when the board is configured in this way, and a different TEXT_BASE needs to be used due to the larger sector size of the 64MB flash module. We introduce the suffix _8M and _64M for the BR0/BR6 and the OR0/OR6 values so it is clear which is being used to map what specific device. The larger sector size (512k) of the alternate flash needs a larger malloc pool, otherwise you'll get failures when running saveenv, so bump it up accordingly. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * sbc8548: relocate 64MB user flash to sane boundaryPaul Gortmaker2012-01-11-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current situation has the 64MB user flash at an awkward alignment; shifted back from 0xfc00_0000 by 8M, to leave an 8MB hole for the soldered on boot flash @ EOM. But to switch to optionally supporting booting off the 64MB flash, the 64MB will then be mapped at the sane address of 0xfc00_0000. This leads to awkward things when programming the 64MB flash prior to transitioning to it -- i.e. even though the chip spans from 0xfb80_0000 to 0xff7f_ffff, you would have to program a u-boot image into the two sectors from 0xfbf0_0000 --> 0xfbff_ffff so that it was in the right place when JP12/SW2.8 were switched to make the 64MB on /CS0. (i.e. the chip is only looking at the bits in mask 0x3ff_ffff) We also have to have three TLB entries responsible for dealing with mapping the 64MB flash due to this 8MB of misalignment. In the end, there is address space from 0xec00_0000 to 0xefff_ffff where we can map it, and then the transition from booting from one config to the other will be a simple 0xec --> 0xfc mapping. Plus we can toss out a TLB entry. Note that TLB0 is kept at 64MB and not shrunk down to the 8MB boot flash; this means we won't have to change it when the alternate config uses the full 64MB for booting, in TLB0. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mmc: Change board_mmc_getcd() function prototype.Thierry Reding2012-01-08-10/+2
|/ | | | | | | | | | | | | | | | | | | | | The new API no longer uses the extra cd parameter that was used to store the card presence state. Instead, this information is returned via the function's return value. board_mmc_getcd() returns -1 to indicate that no card-detection mechanism is implemented; 0 indicates that no card is present and 1 is returned if it was detected that a card is present. The rationale for this change can be found in the following email thread: http://lists.denx.de/pipermail/u-boot/2011-November/110180.html In summary, the old API was not consistent with the rest of the MMC API which always passes a struct mmc as the first parameter. Furthermore the cd parameter was used to mean "card absence" in some implementations and "card presence" in others. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-01-05-0/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: tegra2: Optimize out-of-tree build for Ventana. tegra: Move boards over to use arch-level board UART function tegra: Add support for UART init in cpu board.c tegra: Add a function mux feature tegra: add clock_ll_start_uart() to enable UART prior to reloc tegra: Move clock_early_init() to arch_cpu_init() tegra: Move cpu_init_cp15() to arch_cpu_init() arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/master tegra: Fix build error in plutux, medcom tegra2: Add Avionic Design Medcom support. tegra2: Add Avionic Design Plutux support. tegra2: Add common Avionic Design Tamonten support. tegra2: Move tegra2_mmc_init() prototype to public header. tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000. tegra2: Always build with USE_PRIVATE_LIBGCC=yes. tegra2: Plumb in SPI/UART switch code tegra2: spi: Support SPI / UART switch tegra2: Implement SPI / UART GPIO switch tegra2: Enable SPI environment on Seaboard tegra2: config: Enable SPI flash on Seaboard tegra2: spi: Add SPI driver for Tegra2 SOC tegra2: Add UARTB support tegra2: Tidy UART selection arm, davinci: Fix build warnings for cam_enc_4xx Devkit8000: Switch over to enable_gpmc_cs_config arm, davinci: Add support for generating AIS images to the Makefile mkimage: Fix variable length header support arm, da850evm: Add an SPL for SPI boot arm, davinci: Add SPL support for DA850 SoCs sf: Add spi_boot() to allow booting from SPI flash in an SPL spl: display_options.o is required for SPI flash support in SPL ARM: omap3: add support to Technexion twister board ARM: omap3: added common configuration for Technexion TAM3517 vision2: Fix checkpatch warning
| * arm, da850evm: Add an SPL for SPI bootChristian Riesch2011-12-24-0/+9
| | | | | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
| * sf: Add spi_boot() to allow booting from SPI flash in an SPLChristian Riesch2011-12-24-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | git-mailrc: Add self to davinci/omap, add tiTom Rini2012-01-05-2/+3
|/ | | | | | | | Adding a 'ti' alias since not all parts are "omap" or "davinci" and adding myself to that alias as co-custodian of u-boot-ti Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* doc/mkimage.1: Fix -D/-f options formattingHorst Kronstorfer2011-12-23-2/+2
| | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
* doc/mkimage.1: Fix some typosHorst Kronstorfer2011-12-21-6/+6
| | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Coding Style cleanupWolfgang Denk2011-12-19-34/+32
| | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* MIPS: remove broken "tb0229" boardWolfgang Denk2011-12-12-3/+4
| | | | | | | The "tb0229" board has long been unmaintained, and is broken. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* M28: Document that units has to be set to sectors on SD bootcardMarek Vasut2011-12-09-1/+2
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* MPC850: remove obsolete "rmu" BoardWolfgang Denk2011-12-08-0/+1
| | | | | | | The "rmu" board has long been unmaintained, and is broken. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* MPC8240: remove obsolete "OXC" boardWolfgang Denk2011-12-08-1/+2
| | | | | | | The OXC board has long been unmaintained, and is broken. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* MPC7xx: remove obsolete "BAB7xx" boardWolfgang Denk2011-12-08-0/+1
| | | | | | | | The BAB7xx boards are almost deceased. They cause build warnings, an it's not worth the effort to fix these. Remove the dead body. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Frank Gottschling <fgottschling@eltec.de>
* PXA: Drop XM250 boardMarek Vasut2011-12-06-0/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop PLEB2 boardMarek Vasut2011-12-06-0/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop CRADLE boardMarek Vasut2011-12-06-0/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop CERF250 boardMarek Vasut2011-12-06-0/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* add a git mailrc file for maintainersMike Frysinger2011-12-06-0/+101
| | | | | | This should make sending out e-mails to the right people easier. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* miiphy: Note that miiphy_* API is deprecatedAndy Fleming2011-12-05-0/+11
| | | | | | | We want to move everything to phylib, and we definitely don't want new drivers using the miiphy infrastructure. Signed-off-by: Andy Fleming <afleming@freescale.com>
* sh: Add updating method of SPI ROM to README of sh7757lcrNobuhiro Iwamatsu2011-12-02-0/+14
| | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* powerpc/p3060qds: Add board related support for P3060QDS platformShengzhou Liu2011-11-29-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | The P3060QDS is a Freescale reference board for the six-core P3060 SOC. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM for RCW Ethernet: - Eight Ethernet controllers (4x1G + 4x1G/2.5G) - Three VSC8641 PHYs on board (2xRGMII + 1xMII) - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports two dUARTs up to 115200 bps for console RapidIO: Two RapidIO, sRIO1 and sRIO2 Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix Stelian's email addressStelian Pop2011-11-27-1/+1
| | | | | | | Change my old email address which is no longer valid. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* M28: Add doc/README.m28 documentationMarek Vasut2011-11-11-0/+223
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-5/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * powerpc/mpc83xx: Add 33.33MHz support for mpc8360emdsJerry Huang2011-11-07-5/+13
| | | | | | | | | | | | | | | | The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | OMAP3: mvblx: Initial support for mvBlueLYNX-XMichael Jones2011-11-04-0/+5
| | | | | | | | | | | | | | | | Add support for the MATRIX VISION mvBlueLYNX-X, an OMAP3-based intelligent camera. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add cam_enc_4xx supportHeiko Schocher2011-11-03-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - DM368 SOC - booting with spl not with UBL from TI - before loading u-boot from NAND into RAM, test the RAM with the post memory test. If error is found, switch all LEDs on and halt system. - SPI Flash Dataflash Typ: M25PE80 - Ethernet DM9161BI - MMC - USB Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add support for new spl frameworkHeiko Schocher2011-11-03-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | spl: add option for adding post memory test to the SPL frameworkHeiko Schocher2011-11-03-0/+1
|/ | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* SPL: Add DMA librarySimon Schwarz2011-10-27-0/+1
| | | | | | | | Adding a DMA library to the SPL. It is used if CONFIG_SPL_DMA_SUPPORT is defined. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Add interface for omap3 DMASimon Schwarz2011-10-27-0/+18
| | | | | | | Adds an interface to use the OMAP3 DMA. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* fdt: ARM: Add fdtcontroladdr to set device tree address in environmentSimon Glass2011-10-26-0/+12
| | | | | | | | | | This adds support for a new environment variable called 'fdtcontroladdr'. If defined, the hex address is used as the address of the control fdt for U-Boot. Note: I have not changed CONFIG_PRAM section as I already have an outstanding patch on that. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add support for embedded device tree (CONFIG_OF_EMBED)Simon Glass2011-10-26-0/+172
| | | | | | | | | | | | | | | | | This new option allows U-Boot to embed a binary device tree into its image to allow run-time control of peripherals. This device tree is for U-Boot's own use and is not necessarily the same one as is passed to the kernel. The device tree compiler output should be placed in the $(obj) rooted tree. Since $(OBJCOPY) insists on adding the path to the generated symbol names, to ensure consistency it should be invoked from the directory where the .dtb file is located and given the input file name without the path. This commit contains my entry for the ugliest Makefile / shell interaction competition. Signed-off-by: Simon Glass <sjg@chromium.org>
* cache: add ALLOC_CACHE_ALIGN_BUFFER macroAnton staaf2011-10-25-0/+2
| | | | | | | | | | | | | This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
* MPC85xx: remove broken "mpq101" boardWolfgang Denk2011-10-23-0/+1
| | | | | | | | | | | The board stopped building some time ago, and the board maintainer agrtees to drop it - see http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112674 Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alex Dubov <oakad@yahoo.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kumar Gala <galak@kernel.crashing.org>
* common: cosmetic: CONFIG_BOOTFILE checkpatch complianceJoe Hershberger2011-10-22-1/+1
| | | | | | | | | Remove MK_STR from places that consume CONFIG_BOOTFILE to force all definitions to be string literals. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* doc/README: documents and readme for NDS32 archMacpaul Lin2011-10-22-0/+171
| | | | | | | Documents and READMEs for NDS32 architecture. It patch also provides usage of SoC AG101 and board ADP-AG101. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* sandbox: Add architecture header filesSimon Glass2011-10-17-0/+53
| | | | | | | This adds required header files for the sandbox architecture, and a basic description of what sandbox is (README.sandbox). Signed-off-by: Simon Glass <sjg@chromium.org>
* Add pxe commandJason Hobbs2011-10-17-0/+240
| | | | | | | | | | | | Add pxe command, which is intended to mimic PXELINUX functionality. 'pxe get' uses tftp to retrieve a file based on UUID, MAC address or IP address. 'pxe boot' interprets the contents of PXELINUX config like file to boot using a specific initrd, kernel and kernel command line. This patch also adds a README.pxe file - see it for more details on the pxe command. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* common, menu: use abortboot for menu timeoutJason Hobbs2011-10-17-3/+3
| | | | Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* Add generic, reusable menu codeJason Hobbs2011-10-17-0/+119
| | | | | | | This will be used first by the pxe code, but is intended to be generic and reusable for other jobs in U-boot. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* powerpc/8xxx: Add support for interactive DDR programming interfaceYork Sun2011-10-09-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interactive DDR debugging provides a user interface to view and modify SPD, DIMM parameters, board options and DDR controller registers before DDR is initialized. With this feature, developers can fine-tune DDR for board bringup and other debugging without frequently having to reprogram the flash. To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header file and set an environment variable to activate it. Syntax: setenv ddr_interactive on After reset, U-boot prompts before initializing DDR controllers FSL DDR> The available commands are print print SPD and intermediate computed data reset reboot machine recompute reload SPD and options to default and recompute regs edit modify spd, parameter, or option compute recompute registers from current next_step to end next_step shows current next_step help this message go program the memory controller and continue with u-boot The first command should be "compute", which reads data from DIMM SPDs and board options, performs the calculation then stops before setting DDR controller. A user can use "print" and "edit" commands to view and modify anything. "Go" picks up from current step with any modification and compltes the calculation then enables the DDR controller to continue u-boot. "Recompute" does it over from fresh reading. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* net: drop !NET_MULTI codeMike Frysinger2011-10-05-24/+0
| | | | | | | | | | | This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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