arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	x86: baytrail: Configure FSP UPD from device tree	Andrew Bradford	2015-08-14	-0/+158
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: dts: Fix typo in intel,irq-router.txt	Simon Glass	2015-08-05	-2/+2
\| \| \| \| \| \| \|	Fix a small typo in this binding file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
*	x86: Document irq router device tree bindings	Bin Meng	2015-06-04	-0/+50
\| \| \| \| \| \| \|	Describe all required properties needed by the irq router device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
*	x86: ivybridge: Add additional LPC init	Simon Glass	2014-11-25	-3/+44
\| \| \| \| \| \| \|	Set up all the remaining pieces of the LPC (low-pin-count) peripheral in PCH (Peripheral Controller Hub). Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: ivybridge: Add early LPC init so that serial works	Simon Glass	2014-11-21	-0/+23
\| \| \| \| \| \| \| \|	The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device which provides a serial port. This is accessible on Chromebooks, so enable it early in the boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
*	cros: add cros_ec driver	Hung-ying Tyan	2013-06-26	-0/+38
	This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>