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* doc: SPI: Update status.txtJagannadha Sutradharudu Teki2014-01-12-5/+6
| | | | | | Updated current SPI subsyetem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_PARALLELJagannadha Sutradharudu Teki2014-01-12-0/+27
| | | | | | | | | This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_STACKEDJagannadha Sutradharudu Teki2014-01-12-0/+65
| | | | | | | | | This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: Add Faraday SPI controller supportKuo-Jung Su2014-01-11-0/+41
| | | | | | | | | | | | | | | | | The Faraday FTSSP010 is a multi-function controller which supports I2S/SPI/SSP/AC97/SPDIF. However This patch implements only the SPI mode. NOTE: The DMA and CS/Clock control logic has been altered since hardware revision 1.19.0. So this patch would first detects the revision id of the underlying chip, and then switch to the corresponding software control routines. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> CC: Tom Rini <trini@ti.com>
* spi: Add support SH Quad SPI driverNobuhiro Iwamatsu2013-12-18-0/+38
| | | | | | | | | This patch adds a driver for Renesas SoC's Quad SPI bus. This supports with 8 bits per transfer to use with SPI flash. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sandbox: spi: Add new SPI flash driverMike Frysinger2013-12-09-0/+64
| | | | | | | | | | | | | | This adds a SPI flash driver which simulates SPI flash clients. Currently supports the bare min that U-Boot requires: you can probe, read, erase, and write. Should be easy to extend to make it behave more exactly like a real SPI flash, but this is good enough to merge now. sjg@chromium.org added a README and tidied up code a little. Added a required map_sysmem() for sandbox. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* doc: SPI: Update SPI status trackJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | Updated SPI/status.txt, with memory_map and TODO. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* README: qspi usecase and testing documentation.Poddar, Sourav2013-10-07-0/+95
| | | | | | | | Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* doc: SPI: Add status.txt for tracking SPI subsys statusJagannadha Sutradharudu Teki2013-10-07-0/+28
doc/SPI/status.txt added to track the u-boot SPI subsystem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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