| Commit message (Collapse) | Author | Age | Lines | |
|---|---|---|---|---|
| * | armv8: LS2080A: Rename LS2085A to reflect LS2080A | Prabhakar Kushwaha | 2015-11-30 | -2/+2 |
| | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com> | |||
| * | fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses | Bhupesh Sharma | 2015-02-24 | -0/+25 |
| This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> | ||||
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| U-boot NXP imx6 | git@iatec.biz |
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