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* | | | | | | [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-4/+24
|/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | [PATCH] 44x: Fix problem with DDR controller setup (refresh rate)Stefan Roese2007-01-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a problem with an incorrect setup for the refresh timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | [PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese2007-01-05-3/+0
| |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/hs/TQ/u-boot-devWolfgang Denk2006-12-24-3/+64
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| * | | | Added support for the TQM8272 board from TQHeiko Schocher2006-12-21-3/+64
| | |/ / | |/| | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | Preliminary support for the iDMR board (ColdFire).Bartlomiej Sieka2006-12-20-1/+1
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* | | Code cleanup.Wolfgang Denk2006-11-30-11/+11
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* | | Merge with http://opensource.freescale.com/pub/scm/u-boot-83xx.gitWolfgang Denk2006-11-30-719/+818
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| * \ \ Merge http://www.denx.de/git/u-bootKim Phillips2006-11-28-46/+47
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| * | | mpc83xx: Miscellaneous code style fixesTimur Tabi2006-11-28-87/+32
| | | | | | | | | | | | | | | | | | | | | | | | Implement various code style fixes and similar changes. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Update 83xx to use fsl_i2c.cTimur Tabi2006-11-03-426/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files. Added multiple I2C bus support to fsl_i2c.c. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi2006-11-03-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Lindent and clean up cpu/mpc83xx/speed.cKim Phillips2006-11-03-79/+82
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| * | | mpc83xx: Fix the incorrect dcbz operationDave Liu2006-11-03-34/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 834x rev1.x silicon has one CPU5 errata. The issue is when the data cache locked with HID0[DLOCK], the dcbz instruction looks like no-op inst. The right behavior of the data cache is when the data cache Locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The 834x rev3.0 and later and 8360 have not this bug inside. So, when 834x rev3.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.x can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running on fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * Fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Otherwise, it will corrupt the stack in cache, The processor will checkstop reset. Signed-off-by: Dave Liu <daveliu@freescale.com>
| * | | mpc83xx: change ft code to modify local-mac-address propertyKim Phillips2006-11-03-2/+2
| | | | | | | | | | | | | | | | | | | | Update 83xx OF code to update local-mac-address properties for ethernet instead of the obsolete 'address' property.
| * | | mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and ↵Timur Tabi2006-11-03-84/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8360EMDS This patch also adds an improved I2C set_speed(), which handles all clock frequencies. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: add QE ethernet supportDave Liu2006-11-03-7/+120
| | | | | | | | | | | | | | | | this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
| * | | mpc83xx: Add MPC8360EMDS basic board supportDave Liu2006-11-03-258/+309
| | | | | | | | | | | | | | | | | | | | Add support for the Freescale MPC8360EMDS board. Includes DDR, DUART, Local Bus, PCI.
| * | | mpc83xx: Add support for the MPC8349E-mITXTimur Tabi2006-11-03-3/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006090742000024 "Add support for multiple I2C buses" 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x" 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c" 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems" 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems" CHANGELOG: * Add support for the Freescale MPC8349E-mITX reference design platform. The second TSEC (Vitesse 7385 switch) is not supported at this time. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | Multi-bus I2C implementation of MPC834xBen Warren2006-11-03-24/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hello, Attached is a patch implementing multiple I2C buses on the MPC834x CPU family and the MPC8349EMDS board in particular. This patch requires Patch 1 (Add support for multiple I2C buses). Testing was performed on a 533MHz board. /*** Note: This patch replaces ticket DNX#2006083042000027 ***/ Signed-off-by: Ben Warren <bwarren@qstreams.com> CHANGELOG: Implemented driver-level code to support two I2C buses on the MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds are 50kHz, 100kHz and 400kHz on each bus. regards, Ben
| * | | mpc83xx: Add support for Errata DDR6 on MPC 834x systemsTimur Tabi2006-11-03-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CHANGELOG: * Errata DDR6, which affects all current MPC 834x processors, lists changes required to maintain compatibility with various types of DDR memory. This patch implements those changes. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Add support for variable flash memory sizes on 83xx systemsTimur Tabi2006-11-03-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CHANGELOG: * On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access window registers, instead of using a hard-coded value of 8MB. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Changed to unified mpx83xx names and added common 83xx changesDave Liu2006-11-03-131/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Incorporated the common unified variable names and the changes in preparation for releasing mpc8360 patches. Signed-off-by: Dave Liu <daveliu@freescale.com>
| * | | mpc83xx: Removed unused file resetvec.S for mpc83xx cpuTanya Jiang2006-11-03-7/+1
| | |/ | |/| | | | | | | | | | | | | Removed unused file resetvec.S for mpc83xx cpu Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
* | | [PATCH] [MPC52xx] Use IPB bus frequency for SOC peripheralsGrant Likely2006-11-29-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The soc node of the mpc52xx needs to be loaded with the IPB bus frequency, not the XLB frequency. This patch depends on the previous patches for MPC52xx device tree support Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* | | [PATCH] Add support for Prodrive P3M750 & P3M7448 (P3Mx) boardsStefan Roese2006-11-29-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Prodrive P3M750 (PPC750 & MV64460) and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are quite similar and share the same board directory "prodrive/p3mx" and the same config file "p3mx.h". Signed-off-by: Stefan Roese <sr@denx.de>
* | | [PATCH] Enable the IceCube/lite5200 variants to pass a device tree to Linux.Stefan Roese2006-11-28-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the code and configuration necessary to boot with an arch/powerpc Linux kernel. Signed-off-by: Grant Likely <grant.likely@gmail.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* | | [PATCH] PPC4xx: 440SP Rev. C detection addedStefan Roese2006-11-28-0/+4
| |/ |/| | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/sr/git/u-boot/denx-alpr-merge-testWolfgang Denk2006-11-27-31/+31
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| * | [PATCH] 4xx: Fix problem with board specific reset code (now for real)Stefan Roese2006-11-27-1/+2
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] 4xx: Fix problem with board specific reset codeStefan Roese2006-11-27-0/+3
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] Remove testing 4xx enet PHY setupStefan Roese2006-11-27-16/+1
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] Update Prodrive ALPR board support (440GX)Stefan Roese2006-11-27-5/+8
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-27-11/+12
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| * \ \ Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-10-478/+6991
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| * | | Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-12/+8
| | | | | | | | | | | | | | | | Patch by Stefan Roese, 07 Oct 2006
| * | | Merge with /home/stefan/git/u-boot/denxStefan Roese2006-09-18-4044/+2022
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| * | | | Add initial support for the ALPR board from ProdriveStefan Roese2006-08-15-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | NAND needs some additional testing Patch by Heiko Schocher, 15 Aug 2006
* | | | | [PATCH] 4xx_enet.c: Correct the setting of zmiifer registerStefan Roese2006-11-27-4/+4
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Patch below corrects the setting of the zmiifer register, it was overwritting the register rather than ORing the settings. Signed-off-by: Neil Wilson <NWilson@airspan.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | [PATCH] PPC4xx start.S: Fix for processor errataStefan Roese2006-11-22-11/+12
| |_|/ |/| | | | | | | | | | | | | | | | | | | | Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx errata 1.12: 440_33 by moving patch up in code. Signed-off-by: Jeff Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | [PATCH] omap925.c: Remove unused functionsStefan Roese2006-10-28-34/+0
| | | | | | | | | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | | MPC86xx: Cleaned up unused and conditionally used local variables.Jon Loeliger2006-10-27-6/+2
| | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | Fix "ar" flags in some Makefiles to allow for silent "make -s"Wolfgang Denk2006-10-27-3/+3
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* | | Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.cStefan Roese2006-10-24-4/+9
| | | | | | | | | | | | Patch by Stefan Roese, 24 Oct 2006
* | | Code cleanupWolfgang Denk2006-10-24-166/+166
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* | | Merge with /home/wd/git/u-boot/masterWolfgang Denk2006-10-24-0/+2287
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| * | | Add AT32AP CPU and AT32AP7000 SoC supportWolfgang Denk2006-10-24-0/+2287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | Merge with http://www.jdl.com/software/u-boot-86xx.gitWolfgang Denk2006-10-20-372/+4600
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| * | | Merge branch 'i2c'Jon Loeliger2006-10-20-266/+1
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| | * | | Converted all 85xx boards to use a common FSL I2C driver.Jon Loeliger2006-10-20-266/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: Jon Loeliger <jdl@freescale.com>
generated by cgit v1.1 at 2024-11-05 21:06:32 +0000