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* core support for Freescale mx31Sascha Hauer2008-04-13-0/+478
| | | | | | | This patch adds the core support for Freescale mx31 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Fix compile errorWolfgang Denk2008-04-13-1/+1
| | | | | | ...as suggested by Peter Pearse Signed-off-by: Wolfgang Denk <wd@denx.de>
* Separate omap24xx specific code from arm1136Sascha Hauer2008-04-13-38/+94
| | | | | | | | Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Coding Style cleanup; update CHANGELOGWolfgang Denk2008-04-13-12/+14
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-13-2/+2
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| * mpc83xx: Update DIMM data bus width test to support 40-bit widthLee Nipper2008-04-11-2/+2
| | | | | | | | | | | | | | | | 32-bit wide ECC memory modules report 40-bit width. Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'. Signed-off-by: Lee Nipper <lee.nipper@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-04-13-3/+7
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| * | 85xx: Fix detection of MP cpu spin upKumar Gala2008-04-11-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | We were looking at the wrong memory offset to determine of a secondary cpu had been spun up or not. Also added a warning message if the all the secondary cpus we expect don't spin up. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: Use SVR_SOC_VER instead of SVR_VERKumar Gala2008-04-11-2/+2
| |/ | | | | | | | | | | | | | | The recent change introduced by 'Update SVR numbers to expand support' now requires that we use SVR_SOC_VER instead of SVR_VER if we want to compare against a particular processor id. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-sparcWolfgang Denk2008-04-13-0/+6679
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| * SPARC: Added support for SPARC LEON2 SOC Processor.Daniel Hellstrom2008-04-08-0/+2370
| | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * SPARC/LEON3: Added AMBA Bus Plug&Play information print command (ambapp). It ↵Daniel Hellstrom2008-04-08-0/+20
| | | | | | | | | | | | can print available cores (type: AHB Master, AHB Slave, APB Slave), their address ranges, IRQ number and version. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * SPARC: Added support for SPARC LEON3 SOC processor.Daniel Hellstrom2008-04-08-0/+4289
| | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* | Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:Wolfgang Denk2008-04-11-718/+188
|/ | | | | | | | | | | | | | | | | | | | | | Reverting became necessary after it turned out that the patches in the u-boot-arm repo were modified, and in some cases corrupted. This reverts the following commits: 066bebd6353e33af3adefc3404560871699e9961 7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6 c88ae20580b2b01487b4cdcc8b2a113f551aee36 a147e56f03871bba4f05058d5e04ce7deb010b04 d6674e0e2a6a1f033945f78838566210d3f28c95 8c8463cce44d849e37744749b32d38e1dfb12e50 c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d 8bf69d81782619187933a605f1a95ee1d069478d 8c16cb0d3b971f46fbe77c072664c0f2dcd4471d a574a73852a527779234e73e17e7597fd8128882 1377b5583a48021d983e1fd565f7d40c89e84d63 1704dc20917b4f71e373e2c888497ee666d40380 Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-fdtWolfgang Denk2008-04-08-10/+23
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| * MPC8xx: Fix libfdt support introduced in commit 77ff7b74Jean-Christophe PLAGNIOL-VILLARD2008-04-02-10/+23
| | | | | | | | | | | | | | | | | | | | fdt.c: In function 'ft_cpu_setup': fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32' fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32' fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet' fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory' Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-at91Wolfgang Denk2008-04-08-152/+193
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| * | AT91SAM9: Move CONFIG_HAS_DATAFLASH to MakefileJean-Christophe PLAGNIOL-VILLARD2008-04-01-7/+7
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | Port AT91CAP9 to the new headersStelian Pop2008-04-01-56/+100
| | | | | | | | | | | | | | | | | | Adapt the existing AT91CAP9 code to the new headers and APIs. Signed-off-by: Stelian Pop <stelian@popies.net>
| * | Move at91cap9 specific files to at91sam9 directoryStelian Pop2008-04-01-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a common infrastructure can be used. Let this infrastructure be named after the AT91SAM9 family, and move the existing AT91CAP9 files to the new place. Signed-off-by: Stelian Pop <stelian@popies.net>
| * | Use timer_init() instead of board supplied interrupt_init()Stelian Pop2008-04-01-2/+2
| | | | | | | | | | | | | | | | | | | | | The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by the board, so use timer_init() instead of interrupt_init(). Signed-off-by: Stelian Pop <stelian@popies.net>
| * | use correct at91rm9200 register nameDavid Brownell2008-03-30-3/+3
| |/ | | | | | | | | | | | | | | This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-coldfireWolfgang Denk2008-04-08-37/+305
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| * | ColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.STsiChung Liew2008-03-31-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the version_string function in start.S is not 4-byte align, it will cause the compiler generates "unaligned opcodes detected in executable segment". This issue affects all ColdFire CPUs. By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if it is not aligned. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: John Rigby <jrigby@freescale.com>
| * | ColdFire: Add dspi and serial flash support for MCF5445xTsiChung Liew2008-03-31-1/+74
| | | | | | | | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: John Rigby <jrigby@freescale.com>
| * | ColdFire: Remove R5200 boardTsiChung Liew2008-03-31-33/+1
| | | | | | | | | | | | | | | | | | | | | | | | This board never went into production Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com> Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: John Rigby <jrigby@freescale.com>
| * | ColdFire: Added MCF5275 cpu support.Matthew Fettke2008-03-31-3/+224
| | | | | | | | | | | | | | | | | | Signed-off-by: Matthew Fettke <mfettke@videon-central.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: John Rigby <jrigby@freescale.com>
| * | ColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282TsiChung Liew2008-03-31-2/+2
| |/ | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: John Rigby <jrigby@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-blackfinWolfgang Denk2008-04-08-8702/+2142
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| * | Blackfin: unify cpu and boot modesMike Frysinger2008-03-30-8702/+2142
| |/ | | | | | | | | | | | | | | All of the duplicated code for Blackfin processors and boot modes have been unified. After all, the core is the same for all processors, just the peripheral set differs (which gets handled in the drivers). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2008-04-08-188/+718
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| * | Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.cPeter Pearse2008-03-30-1/+1
| | | | | | | | | | | | | | | | | | to prevent compilation error. Signed-off-by: Peter Pearse <peter.pearse@arm.com>
| * | core support for Freescale mx31Sascha Hauer2008-03-30-0/+486
| | | | | | | | | | | | | | | | | | | | | This patch adds the core support for Freescale mx31 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | Separate omap24xx specific code from arm1136Sascha Hauer2008-03-30-77/+154
| | | | | | | | | | | | | | | | | | | | | Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | Removes all board specific code from the arch. part for DM644x (DaVinci) boardsPieter Voorthuijsen2008-03-30-64/+56
| | | | | | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
| * | - Remove *_masked() functions as noted by WolfgangDirk Behme2008-03-30-47/+22
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Adapt register naming to recent TI spec (sprue26, March 2007) - Fix reset_timer() handling - As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179 - Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV). Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing! Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-04-08-1/+2
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| * | sh: Add support SH4 cache controlNobuhiro Iwamatsu2008-03-28-1/+2
| | | | | | | | | | | | | | | | | | Add support SH4 cache control and flash_cache function Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Move SuperH PCI driver from cpu/sh4 to drivers/pciNobuhiro Iwamatsu2008-03-28-194/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support PCI of SuperH and SH7780Yusuke Goda2008-03-28-1/+194
| |/ | | | | | | | | | | | | This patch add support PCI of SuperH base code and SH7780 specific code. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-07-144/+70
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: lib_ppc/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Make MPC83xx one step closer to full relocation.Joakim Tjernlund2008-03-28-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx and use GOT relative reference. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) codeKim Phillips2008-03-28-123/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6, 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing and processor ID display. Add REVID_{MAJ,MIN}OR macros to make REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR convenience macros. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: display ddr frequency in board_add_ram_info bannerKim Phillips2008-03-28-4/+7
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: unreinvent mem_clkKim Phillips2008-03-28-13/+13
| |/ | | | | | | | | | | | | delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to mem_*_clk for consistency's sake. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3Stefan Roese2008-04-03-3/+13
| | | | | | | | | | | | | | | | This patch fixes a problem with the RGMII setup of the 460GT. The 460GT has 2 RGMII instances and we need to configure the 2nd RGMII instance for the EMAC2+3 channels. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setupLarry Johnson2008-03-31-13/+14
| | | | | | | | Signed-off-by: Larry Johnson <lrj@acm.org>
* | ppc4xx: PPC405EP Set EMAC noise filter bitsMarkus Brunner2008-03-27-1/+1
| | | | | | | | | | | | | | | | | | This bug was introduced with commit aee747f19b460a0e9da20ff21e90fdaac1cec359 which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set. Signed-off-by: Markus Brunner <super.firetwister@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPxMike Nuss2008-03-27-1/+99
| | | | | | | | | | | | | | | | | | | | | | | | On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured after startup to change the speed of the clocks. This patch adds the option CFG_PLL_RECONFIG. If this option is set to 667, the CPU initialization code will reconfigure the PLL to run the system with a CPU frequency of 667MHz and PLB frequency of 166MHz, without the need for an external EEPROM. Signed-off-by: Mike Nuss <mike@terascala.com> Acked-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix compilation warning in 4xx_enet.cStefan Roese2008-03-27-7/+6
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
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