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* PQ2FADS: Enable PCI.Scott Wood2009-04-04-0/+2
| | | | | | PCI on PQ2FADS is very similar to PCI on MPC8272ADS. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Blackfin: do not delay on output bytesMike Frysinger2009-04-02-4/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix crash when booting from external memoryMike Frysinger2009-04-02-0/+11
| | | | | | | | | When testing a u-boot binary that hasn't been booted from the bootrom, we have to make sure the bootstruct structure has sane storage space. If we don't, the initcode will crash when it tries to dereference an invalid pointer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-04-02-3668/+251
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| * OMAP: use {read,write}l to access timer registersLadislav Michl2009-03-30-12/+9
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
| * OMAP: rename timer divisorLadislav Michl2009-03-30-4/+4
| | | | | | | | | | | | | | Divisor field is called PTV not PVT. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP: reindent timer codeLadislav Michl2009-03-30-11/+8
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
| * s3c2410: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-180/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-448/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-306/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-335/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-476/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-228/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm720t/clps7111: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-126/+1
| | | | | | | | | | | | add CONFIG_CLPS7111_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * lpc2292: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | | | | | | | | | add CONFIG_LPC2292_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ks8695: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-118/+1
| | | | | | | | | | | | add CONFIG_KS8695_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c64xx: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-03-29-46/+0
| | | | | | | | | | | | add CONFIG_USB_S3C64XX to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx31: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-233/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * netarm: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-201/+1
| | | | | | | | | | | | add CONFIG_NETARM_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * sa1100: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-161/+1
| | | | | | | | | | | | add CONFIG_SA1100_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: extract cache from cpu.cJean-Christophe PLAGNIOL-VILLARD2009-03-29-63/+92
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-219/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move rtc driver to drivers/rtcJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-29-291/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c4510b: move specific code to soc directoryJean-Christophe PLAGNIOL-VILLARD2009-03-29-62/+132
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | 85xx: Introduce determine_mp_bootpg() helper.Kumar Gala2009-04-01-23/+16
| | | | | | | | | | | | | | | | | | | | | | | | Match determine_mp_bootpg() that was added for 86xx. We need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. Also added a comment about how cpu_reset() is dealing w/an errata on early 85xx MP HW. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Cleanup MP supportKumar Gala2009-04-01-52/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx * Introduce determine_mp_bootpg() helper. We'll need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. * Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to allow cmd_mp.c to build and work. In the future we should look at implementing all these functions. This could be common w/85xx if we use spin tables on 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | MPC85xx: Add MPC8569 CPU supportHaiying Wang2009-03-30-0/+52
| | | | | | | | | | | | | | | | | | There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Add support for additional e500mc featuresKumar Gala2009-03-30-1/+94
| | | | | | | | | | | | | | * Enable backside L2 * e500mc no longer has timebase enable in HID (moved to CCSR register) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl-ddr: add the DDR3 SPD infrastructureDave Liu2009-03-30-48/+758
| | | | | | | | | | | | | | | | | | - support mirrored DIMMs, not support register DIMMs - test passed on P2020DS board with MT9JSF12872AY-1G1D1 - test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1 Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
* | fsl-ddr: Fix two bugs in the ddr infrastructureDave Liu2009-03-30-1/+4
|/ | | | | | | | | | | | 1. wr_lat UM said the total write latency for DDR2 is equal to WR_LAT + ADD_LAT, the write latency is CL + ADD_LAT - 1. so, the WR_LAT = CL - 1; 2. rd_to_pre we missed to add the ADD_LAT for DDR2 case. Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Dave Liu <daveliu@freescale.com>
* ppc: cleanup compiler errors/warningsHeiko Schocher2009-03-27-0/+1
| | | | | | | | | | | | | Current u-boot top of tree builds with warnings/errors for the following boards: ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823 RPXClassic debris PN62 following patch solves this. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-03-26-3/+1035
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| * at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre2009-03-22-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common macb initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+174
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common usb host initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+36
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common led management to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+65
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common spi initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-5/+372
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common serial initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-1/+386
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | mpc5200: suppress printf until console initializedJon Smirl2009-03-25-10/+20
| | | | | | | | | | | | | | | | | | On boards which have the environment in eeprom, i2c_init() is called before the console and RAM are initialized. Suppress printfs until the console is initialized. Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
* | Blackfin: put memory into self-refresh before/after programming clocksMike Frysinger2009-03-23-82/+190
| | | | | | | | | | | | | | | | | | | | | | When initializing the core clocks, stick external memory into self-refresh. This gains us a few cool things: - support suspend-to-RAM with Linux - reprogram clocks automatically when doing "go" on u-boot.bin in RAM - make sure settings are stable before flashing new version - finally fully unify initialize startup code path between LDR/non-LDR Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: do not program voltage regulator on parts that do not have oneMike Frysinger2009-03-23-3/+20
| | | | | | | | | | | | | | Some newer Blackfins (like the BF51x) do not have an on-chip voltage regulator, so do not attempt to program the memory as if it does. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: setup a sane default EBIU_SDBCTL for SDRAM controllersMike Frysinger2009-03-23-0/+33
| | | | | | | | | | | | | | If the board config does not specify an explicit EBIU_SDBCTL value, set it up with sane values based on other configuration options. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: handle reboot anomaly 432Mike Frysinger2009-03-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | Workaround anomaly 432: The bfrom_SysControl() firmware function does not clear the SIC_IWR1 register before executing the PLL programming sequence. Therefore, any interrupt enabled in the SIC_IWR1 register prior to the call to bfrom_SysControl() can prematurely terminate the idle sequence required for the PLL to relock properly. SIC_IWR0 is properly handled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: kill off LDR jump blockMike Frysinger2009-03-23-7/+5
| | | | | | | | | | | | | | The Boot ROM uses EVT1 as the entry point so set that rather than having to use a tiny jump block in the default EVT1 location. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: simplify symbol_lookup() a bitMike Frysinger2009-03-23-1/+1
| | | | | | | | | | | | No need to skip a byte as the symbol table handles this. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: mark bfin_reset staticMike Frysinger2009-03-23-1/+1
| | | | | | | | | | | | The function is only used locally, so mark it static. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: fix jtag console tstcMike Frysinger2009-03-23-4/+11
| | | | | | | | | | | | | | | | | | | | The jtag tstc operation was checking the hardware to see if data is available from it (which is fine for the jtag getc operation), but the higher layers need to know whether any data is available. Since we have to read up to 4 bytes at a time from the hardware, the higher layers need to know they can consume the cached bytes as well. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'mimc200'Haavard Skinnemoen2009-03-23-321/+432
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| * AVR32: Make cacheflush cpu-dependentOlav Morken2009-02-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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