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* AVR32: Add clk and gpio infrastructure for macb0 and macb1Haavard Skinnemoen2007-04-14-0/+50
| | | | | | | | Implement functions for configuring the macb0 and macb1 pins, as well as functions for getting the clock rate of the various busses the macb ethernet controllers are connected to. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: Relocate u-boot to SDRAMHaavard Skinnemoen2007-04-14-36/+90
| | | | | | | Relocate the u-boot image into SDRAM like everyone else does. This means that we can handle much larger .data and .bss than we used to. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: Resource management rewriteHaavard Skinnemoen2007-04-14-862/+198
| | | | | | | | | | | | | Rewrite the resource management code (i.e. I/O memory, clock gating, gpio) so it doesn't depend on any global state. This is necessary because this code is heavily used before relocation to RAM, so we can't write to any global variables. As an added bonus, this makes u-boot's memory footprint a bit smaller, although some functionality has been left out; all clocks are enabled all the time, and there's no checking for gpio line conflicts. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: Split start_u_boot into board_init_f and board_init_rHaavard Skinnemoen2007-04-14-1/+1
| | | | | | | | | Split the avr32 initialization code into a function to run before relocation, board_init_f and a function to run after relocation, board_init_r. For now, board_init_f simply calls board_init_r at the end. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-04-04-220/+353
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| * Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-03-31-1444/+7674
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| * | ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese2007-03-31-19/+49
| | | | | | | | | | | | | | | | | | | | | Additional RAM information is now printed upon powerup, like DDR2 frequency and CAS latency. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese2007-03-31-48/+81
| | | | | | | | | | | | | | | | | | | | | | | | Fix a bug in the auto calibration routine. This driver now runs more reliable with the tested modules. It's also tested with 167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai. Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge with /home/stefan/git/u-boot/acadiaStefan Roese2007-03-24-156/+226
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| | * | [PATCH] Add 4xx GPIO functionsStefan Roese2007-03-24-114/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some 4xx GPIO functions. It also moves some of the common code and defines into a common 4xx GPIO header file. Signed-off-by: Stefan Roese <sr@denx.de>
| | * | [PATCH] Clean up 40EZ/Acadia supportStefan Roese2007-03-24-42/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up all the open issue of the preliminary Acadia support. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | Minor coding style cleanup.Wolfgang Denk2007-04-04-1/+1
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* | | | Merge with /home/wd/git/u-boot/custodian/u-boot-microblazeWolfgang Denk2007-04-04-8/+838
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| * | | | Support for XUPV2P boardMichal Simek2007-03-26-4/+33
| | | | | | | | | | | | | | | | | | | | | | | | | Reset support BSP autoconfig support
| * | | | [Microblaze][PATCH] part 2Michal Simek2007-03-11-8/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timer support interrupt controller support flash support ethernet support cache support board information support env support booting image support adding support for Xilinx ML401
| * | | | [Microblaze][PATCH]Michal Simek2007-03-11-0/+570
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timer support interrupt controller support flash support ethernet support cache support board information support env support booting image support adding support for Xilinx ML401
* | | | | Fix some minor whitespace violations.Gerald Van Baren2007-03-31-2/+2
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* | | | | Add a flattened device tree (fdt) command (2 of 2)Gerald Van Baren2007-03-31-1/+101
| |_|_|/ |/| | | | | | | | | | | Modifications to the existing code to support the new fdt command.
* | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-03-29-2/+22
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| * | | | Set Rev 2.x 86xx PIC in mixed mode.Haiying Wang2007-03-22-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent false interrupt from hanging Linux as MSR[EE] is set to enable interrupts by changing the PIC out of the default pass through mode into mixed mode. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | | Add support for 8641 Rev 2 silicon.Ed Swarthout2007-03-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch, I am unable to get to the prompt on rev 2 silicon. Only set ddrioovcr for rev1. Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | | | Code cleanup / re-insert previous Copyright entries.Wolfgang Denk2007-03-22-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-blackfinWolfgang Denk2007-03-22-1420/+7647
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| * | | | | [Blackfin][PATCH] Add BF561 EZKIT board supportAubrey Li2007-03-20-0/+2865
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| * | | | | Merge http://www.denx.de/git/u-bootAubrey Li2007-03-19-1/+1
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| * | | | | | [Blackfin][PATCH] Add BF537 stamp board supportAubrey Li2007-03-19-0/+3621
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| * | | | | | [Blackfin][PATCH] minor cleanupAubrey Li2007-03-12-7/+7
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| * | | | | | [Blackfin][PATCH] Fix BUILD_DIR option of MAKEALL building issueAubrey Li2007-03-12-7/+11
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| * | | | | | [Blackfin][PATCH] code cleanupAubrey Li2007-03-12-115/+92
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| * | | | | | [Blackfin][PATCH] code cleanupAubrey Li2007-03-10-180/+177
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| * | | | | | [Blackfin]PATCH-1/2]: Remove obsolete blackfin port and add bf533 platform ↵Aubrey.Li2007-03-09-1454/+1217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | support
* | | | | | | Code cleanup. Update CHANGELOGWolfgang Denk2007-03-21-2/+2
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* | | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-03-21-37/+323
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| * | | | | | Merge with /home/stefan/git/u-boot/acadiaStefan Roese2007-03-21-37/+323
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| | * | | | [PATCH] Add AMCC PPC405EZ supportStefan Roese2007-03-21-37/+323
| | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | SPC1920: fix small clock routing bugMarkus Klotzbuecher2007-03-21-3/+2
| |_|_|/ |/| | | | | | | | | | | Signed-off-by: Markus Klotzbuecher <mk@denx.de>
* | | | [PATCH] TQM8272: dont change the bits given from the HRCWHeiko Schocher2007-03-21-21/+5
|/ / / | | | | | | | | | | | | | | | | | | for the SIUMCR and BCR Register. Fix the calculation for the EEprom Size Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-03-08-1/+1
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| * | [PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUSMatthias Fuchs2007-03-08-1/+1
| | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-03-08-119/+498
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| * | | mpc83xx: Fix config of Arbiter, System Priority, and Clock ModeKumar Gala2007-03-02-6/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The config value for: * CFG_ACR_PIPE_DEP * CFG_ACR_RPTCNT * CFG_SPCR_TSEC1EP * CFG_SPCR_TSEC2EP * CFG_SCCR_TSEC1CM * CFG_SCCR_TSEC2CM Were not being used when setting the appropriate register Added: * CFG_SCCR_USBMPHCM * CFG_SCCR_USBDRCM * CFG_SCCR_PCICM * CFG_SCCR_ENCCM To allow full config of the SCCR. Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349 that were just bogus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | mpc83xx: update [local-]mac-address properties on UEC based devicesKim Phillips2007-03-02-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 8360 and 832x weren't updating their [local-]mac-address properties. This patch fixes that. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | mpc83xx: write MAC address to mac-address and local-mac-addressTimur Tabi2007-03-02-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, this patch updates ftp_cpu_setup() to write the MAC address to mac-address if it exists. This function already updates local-mac-address. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xxXie Xiaobo2007-03-02-61/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code supply fixed and SPD initialization for MPC83xx DDR2 Controller. it pass DDR/DDR2 compliance tests. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
| * | | mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDSXie Xiaobo2007-03-02-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8360E rev2.0 have new spridr,and PVR value, The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
| * | | mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDSXie Xiaobo2007-03-02-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8349E rev3.1 have new spridr,and PVR value, The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
| * | | mpc83xx: don't hang if watchdog configured on 8360, 832xKim Phillips2007-03-02-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | don't hang if watchdog configured on 8360, 832x The watchdog programming model is the same across all 83xx devices; make the code reflect that.
| * | | mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dtKim Phillips2007-03-02-0/+2
| | | | | | | | | | | | | | | | protect memcpy to bad address if a local-mac-address is missing from dt
| * | | mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X insteadKumar Gala2007-03-02-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all MPC834X class processors. Change the protections from CONFIG_MPC8349 to CONFIG_MPC834X so they are more generic. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | mpc83xx: U-Boot support for Wind River SBC8349Paul Gortmaker2007-03-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've redone the SBC8349 support to match git-current, which incorporates all the MPC834x updates from Freescale since the 1.1.6 release, including the DDR changes. I've kept all the SBC8349 files as parallel as possible to the MPC8349EMDS ones for ease of maintenance and to allow for easy inspection of what was changed to support this board. Hence the SBC8349 U-Boot has FDT support and everything else that the MPC8349EMDS has. Fortunately the Freescale updates added support for boards using CS0, but I had to change spd_sdram.c to allow for board specific settings for the sdram_clk_cntl (it is/was hard coded to zero, and that remains the default if the board doesn't specify a value.) Hopefully this should be mergeable as-is and require no whitespace cleanups or similar, but if something doesn't measure up then let me know and I'll fix it. Thanks, Paul.
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