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* omap3: replace all instances of gpmc config struct by one globalDirk Behme2009-08-08-13/+11
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: remove typedefs for configuration structsDirk Behme2009-08-08-29/+29
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: embedd gpmc_cs into gpmc config structMatthias Ludwig2009-08-07-22/+15
| | | | | | | | | Embedd chip select configuration into struct for gpmc config instead of having it completely separated as suggested by Wolfgang Denk on http://lists.denx.de/pipermail/u-boot/2009-May/052247.html Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
* Merge branch 'next' of git://git.denx.de/u-boot-coldfireWolfgang Denk2009-08-04-545/+372
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| * ColdFire: Add DSPI support for MCF5227x and MCF5445xTsiChung Liew2009-07-14-500/+121
| | | | | | | | | | | | | | | | Remove individual CPU specific DSPI driver. Add required feature for the common DSPI driver in cpu_init and in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| * ColdFire: Add M5208EVB and MCF520x CPU supportTsiChung Liew2009-07-14-14/+199
| | | | | | | | Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| * ColdFire: Update for M54451EVBTsiChung Liew2009-07-14-35/+56
| | | | | | | | | | | | | | | | Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
* | rm9200 lowevel_init: don't touch reserved/readonly registersDavid Brownell2009-08-03-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reason the AT91rm9200 lowlevel init writes to a bunch of reserved or read-only addresses. All the boards seem to define the value-to-be-written values as zero ... but they shouldn't actually be writing *anything* there. No documented erratum justifies these accesses. It looks like maybe some pre-release BDI-2000 setup code has been carried along by cargo cult programming since at least late 2004 (per GIT history). Here's a patch disabling what seems to be bogosity. Tested on a csb337; there were no behavioral changes. Signed-off-by: David Brownell <david-b@pacbell.net> on RM9200ek Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Add AT91SAM9260 to at91's lowlevel_init.SEric Benard2009-08-01-1/+1
| | | | | | | | | | | | Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260. Signed-off-by: Eric Benard <eric@eukrea.com>
* | ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chipsStefan Roese2009-07-30-0/+23
| | | | | | | | | | | | | | This patch is based on a diff created by Phong Vo from AMCC. Signed-off-by: Phong Vo <pvo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-07-30-1/+100
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| * | arm nomadik: add gpio supportAlessandro Rubini2009-07-29-1/+100
| | | | | | | | | | | | | | | | | | Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-4/+4
| | | | | | | | | | | | | | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* | | mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove ↵Kim Phillips2009-07-27-2/+2
|/ / | | | | | | | | | | the former Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | cpu/arm920t/start.S: include <common.h> to have ROUND() definedWolfgang Denk2009-07-27-2/+1
| | | | | | | | | | | | | | Commit fcd3c87e made include/common.h usable by assembler code but failed to update cpu/arm920t/start.S Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Make include/common.h usable by assembler codeWolfgang Denk2009-07-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 70ebf316 factored out the ROUND() macro into include/common.h, not realizing that the primary use of this macro on AT91 systems was in start.S where common.h was not included, and could not be included because it contains a lot of C code which the assembler doesn't understand. This patch wraps such code in common.h in a "#ifndef __ASSEMBLY__" construct, and then adds an include to cpu/arm926ejs/start.S thus solving the problem. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2009-07-26-0/+95
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| * | Add AVR32 LCD supportMark Jackson2009-07-26-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AVR32 LCD controller. This patch is based off the latest u-boot-video. A quick summary of what's going on:- Enable LCDC pixel clock Enable LCDC port pins Add framebuffer pointer to global_data struct Allocate framebuffer To use the new code, update your board config to include something like this:- #define CONFIG_LCD 1 #if defined(CONFIG_LCD) #define CONFIG_CMD_BMP #define CONFIG_ATMEL_LCD 1 #define LCD_BPP LCD_COLOR16 #define CONFIG_BMP_16BPP 1 #define CONFIG_FB_ADDR 0x10600000 #define CONFIG_WHITE_ON_BLACK 1 #define CONFIG_VIDEO_BMP_GZIP 1 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 #define CONFIG_ATMEL_LCD_BGR555 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define CONFIG_SPLASH_SCREEN 1 #endif The standard U-Boot BMP and Splash-screen features should just work. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> [agust@denx.de: fixed some style issues] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | ppc4xx: Replace 4xx lowercase SPR referencesMatthias Fuchs2009-07-24-118/+119
| | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Add "chip_config" command for PPC4xx bootstrap configurationStefan Roese2009-07-24-0/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a generic command for programming I2C bootstrap eeproms on PPC4xx. An implementation for Canyonlands board is included. The command name is intentionally chosen not to be PPC4xx specific. This way other CPU's/SoC's can implement a similar command under the same name, perhaps with a different syntax. Usage on Canyonlands: => chip_config Available configurations (I2C address 0x52): 600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100 600-nand - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100 800-nor - NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100 800-nand - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100 1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100 1000-nand - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100 1066-nor - NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88 *** 1066-nand - NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88 => chip_config 600-nor Using configuration: 600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100 done (dump via 'i2c md 52 0.1 10') Reset the board for the changes to take effect Other 4xx boards will be migrated to use this command soon as well. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Dirk Eibach <eibach@gdsys.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | ppc4xx: Fix missing freqOPB for 405EPDirk Eibach2009-07-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | In cpu/ppc4xx/speed.c initialization of sysInfo->freqOPB for 405EP was left out for no obvious reason. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: Fix TLB reset problem with recent 44x imagesStefan Roese2009-07-24-2/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal" booting on some 44x platforms. This breakage is only noticed in some cases while powercycling. As it seems, the code in question in start.S didn't invalidate TLB #0. This makes sense since this TLB is used for the bootrom mapping. With the patch mentioned above even TLB #0 got invalidated resulting in an error later on. This patch now fixes this issue by only invalidating TLB #0 in the RAM- booting case. Tested succesfully on Sequoia and Canyonlands. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <Eibach@gdsys.de>
* | unify HOST_CFLAGS and HOSTCFLAGSMike Frysinger2009-07-23-1/+1
| | | | | | | | | | | | | | | | The top build system sets up HOSTCFLAGS a bit and exports it, but other places use HOST_CFLAGS instead. Unify the two as HOSTCFLAGS so that the values stay in sync. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | fec_mxc: driver for FEC ethernet controller on i.MX27Ilya Yanok2009-07-22-0/+10
| | | | | | | | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | rm9200 ethernet driver: board-specific quirk (csb337)David Brownell2009-07-22-4/+18
| | | | | | | | | | | | | | | | | | | | | | CSB337 boards originally shipped with MicroMonitor, not U-Boot; and with a version using a different convention for recording Ethernet addresses than anyone else. To avoid breaking Linux when it uses U-Boot, have it use the same convention on that hardware. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-23-14/+37
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| * | ARM Cortex A8: Move OMAP3 specific reset handlerMinkyu Kang2009-07-22-14/+37
| | | | | | | | | | | | | | | | | | | | | Because of the reset_cpu is soc specific, should be move to soc Cc: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | 85xx, 86xx: Add common board_add_ram_info()Peter Tyser2009-07-22-41/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, 85xx and 86xx boards would display DRAM information on bootup such as: ... I2C: ready DRAM: Memory controller interleaving enabled: Bank interleaving! 2 GB FLASH: 256 MB ... This patch moves the printing of the DRAM controller configuration to a common board_add_ram_info() function which prints out DDR type, width, CAS latency, and ECC mode. It also makes the DDR interleaving information print out in a more sane manner: ... I2C: ready DRAM: 2 GB (DDR2, 64-bit, CL=4, ECC on) DDR Controller Interleaving Mode: bank FLASH: 256 MB ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fieldsPeter Tyser2009-07-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Blackfin: split cpu COBJS into multilinesMike Frysinger2009-07-18-1/+7
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Blackfin: add os log functionsMike Frysinger2009-07-18-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | Part of the mini Blackfin ABI with operating systems is that they can use 0x4f0-0x4f8 to pass log buffers to/from bootloaders. So add support to U-Boot for reading the log buffer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-07-19-224/+0
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| * | | nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directoryStefan Roese2009-07-16-224/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | | OMAP3 Fix compiler warning for v7_flush_dcache_allTom Rix2009-07-18-0/+3
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On build of omap3 targets in MAKEALL, the *.ERR files have cpu.c: In function 'cleanup_before_linux': cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all' cpu.c:64: warning: implicit declaration of function 'get_device_type The functions v7_flush_dcache_all and get_device_type are declared in include/asm-arm/arch-omap3/sys_proto.h, so use this file to declare the functions. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* | | stdio/device: rework function naming conventionJean-Christophe PLAGNIOL-VILLARD2009-07-18-9/+9
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far the console API uses the following naming convention: ======Extract====== typedef struct device_t; int device_register (device_t * dev); int devices_init (void); int device_deregister(char *devname); struct list_head* device_get_list(void); device_t* device_get_by_name(char* name); device_t* device_clone(device_t *dev); ======= which is too generic and confusing. Instead of using device_XX and device_t we change this into stdio_XX and stdio_dev This will also allow to add later a generic device mechanism in order to have support for multiple devices and driver instances. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | usb: mpc834x: added support of the MPH USB controller in addition to the DR oneValeriy Glushkov2009-07-14-0/+2
|/ | | | | Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC512x: factor out common codeWolfgang Denk2009-07-14-1/+122
| | | | | | | | | | | | | | Now that we have 3 boards for the MPC512x it turns out that they all use the very same fixed_sdram() code. This patch factors out this common code into cpu/mpc512x/fixed_sdram.c and adds a new header file, include/asm-ppc/mpc512x.h, with some macros, inline functions and prototype definitions specific to MPC512x systems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* Merge branch 'master' of /home/wd/git/u-boot/masterWolfgang Denk2009-07-14-11/+509
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| * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-13-2/+188
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| | * at91: Introduction of at91sam9g10 SOC.Sedji Gaouaou2009-07-12-0/+1
| | | | | | | | | | | | | | | | | | | | | AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a faster clock speed: 266/133MHz. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
| | * at91: Introduction of at91sam9g45 SOC.Sedji Gaouaou2009-07-12-2/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. On the board you can find 2 USART, USB high speed, a 480*272 LG lcd, ethernet, gpio/joystick/buttons. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2009-07-13-0/+296
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| | * | sh: unify linker scriptJean-Christophe PLAGNIOL-VILLARD2009-07-08-0/+296
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | all sh boards use the same cpu linker script so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk tested on r2dplus Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-07-13-7/+23
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| | * | ppc4xx: Set default PCI device ID for 405EP boardsMatthias Fuchs2009-07-10-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code only sets the PCI vendor id to 0x1014 and leaved device id to 0x0000. Ths patch .... a) uses the correct PCI_VENDOR_ID_IBM macro for this b) sets the default device ID as stated in the UM to 0x0156 by using PCI_DEVICE_ID_IBM_405GP for this. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: Move 405EP pci code from cpu_init_f() to __pci_pre_init()Matthias Fuchs2009-07-10-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves some basic PCI initialisation from the 4xx cpu_init_f() to cpu/ppc4xx/4xx_pci.c. The original cpu_init_f() function enabled the 405EP's internal arbiter in all situations. Also the HCE bit in cpc0_pci is always set. The first is not really wanted for PCI adapter designs and the latter is a general bug for PCI adapter U-Boots. Because it enables PCI configuration by the system CPU even when the PCI configuration has not been setup by the 405EP. The one and only correct place is in pci_405gp_init() (see "Set HCE bit" comment). So for compatibility reasons the arbiter is still enabled in any case, but from weak pci_pre_init() so that it can be replaced by board specific code. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mpc83xx: USB: fix: access of ehci struct elementsVivek Mahajan2009-07-09-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | It fixes the access to the 'ehci' struct elements for mpc83xx which should have been taken care of in 4ef01010aa4799c759d75e67007fdd3a38c88c8a Sorry about that. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* | | board support patch for phyCORE-MPC5200B-tinyJon Smirl2009-07-10-0/+3
|/ / | | | | | | | | | | | | | | | | | | Add support for the Phytec phyCORE-MPC5200B-tiny. Code originally from Pengutronix.de. Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on Timer 0/1 Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* | ppc4xx: Make pll_write globalMatthias Fuchs2009-07-08-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes pll_write on PPC405EP boards global and callable from C code. pll_write can be used to dynamically modify the PLB:PCI divider as it is required for 33/66 MHz pci adapters based on the 405EP. board_early_init_f() is a good place to do that (check M66EN signal and call pll_write() when it is required). Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove compilation warning "pci_async_enabled defined but not used"Stefan Roese2009-07-08-0/+2
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
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