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* OMAP: use {read,write}l to access timer registersLadislav Michl2009-03-30-12/+9
| | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* OMAP: rename timer divisorLadislav Michl2009-03-30-4/+4
| | | | | | | Divisor field is called PTV not PVT. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* OMAP: reindent timer codeLadislav Michl2009-03-30-11/+8
| | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* s3c2410: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-180/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c24x0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-448/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c24x0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-306/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* davinci: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-335/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-476/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* imx: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-228/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm720t/clps7111: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-126/+1
| | | | | | add CONFIG_CLPS7111_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* lpc2292: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | | | add CONFIG_LPC2292_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ks8695: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-118/+1
| | | | | | add CONFIG_KS8695_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c64xx: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-03-29-46/+0
| | | | | | add CONFIG_USB_S3C64XX to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* imx31: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-233/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* netarm: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-201/+1
| | | | | | add CONFIG_NETARM_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* sa1100: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-161/+1
| | | | | | add CONFIG_SA1100_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c44b0: extract cache from cpu.cJean-Christophe PLAGNIOL-VILLARD2009-03-29-63/+92
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c44b0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-219/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c44b0: move rtc driver to drivers/rtcJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c44b0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-29-291/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* s3c4510b: move specific code to soc directoryJean-Christophe PLAGNIOL-VILLARD2009-03-29-62/+132
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc: cleanup compiler errors/warningsHeiko Schocher2009-03-27-0/+1
| | | | | | | | | | | | | Current u-boot top of tree builds with warnings/errors for the following boards: ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823 RPXClassic debris PN62 following patch solves this. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-03-26-3/+1035
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| * at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre2009-03-22-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common macb initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+174
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common usb host initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+36
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common led management to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+65
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common spi initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-5/+372
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common serial initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-1/+386
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | mpc5200: suppress printf until console initializedJon Smirl2009-03-25-10/+20
| | | | | | | | | | | | | | | | | | On boards which have the environment in eeprom, i2c_init() is called before the console and RAM are initialized. Suppress printfs until the console is initialized. Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
* | Blackfin: put memory into self-refresh before/after programming clocksMike Frysinger2009-03-23-82/+190
| | | | | | | | | | | | | | | | | | | | | | When initializing the core clocks, stick external memory into self-refresh. This gains us a few cool things: - support suspend-to-RAM with Linux - reprogram clocks automatically when doing "go" on u-boot.bin in RAM - make sure settings are stable before flashing new version - finally fully unify initialize startup code path between LDR/non-LDR Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: do not program voltage regulator on parts that do not have oneMike Frysinger2009-03-23-3/+20
| | | | | | | | | | | | | | Some newer Blackfins (like the BF51x) do not have an on-chip voltage regulator, so do not attempt to program the memory as if it does. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: setup a sane default EBIU_SDBCTL for SDRAM controllersMike Frysinger2009-03-23-0/+33
| | | | | | | | | | | | | | If the board config does not specify an explicit EBIU_SDBCTL value, set it up with sane values based on other configuration options. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: handle reboot anomaly 432Mike Frysinger2009-03-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | Workaround anomaly 432: The bfrom_SysControl() firmware function does not clear the SIC_IWR1 register before executing the PLL programming sequence. Therefore, any interrupt enabled in the SIC_IWR1 register prior to the call to bfrom_SysControl() can prematurely terminate the idle sequence required for the PLL to relock properly. SIC_IWR0 is properly handled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: kill off LDR jump blockMike Frysinger2009-03-23-7/+5
| | | | | | | | | | | | | | The Boot ROM uses EVT1 as the entry point so set that rather than having to use a tiny jump block in the default EVT1 location. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: simplify symbol_lookup() a bitMike Frysinger2009-03-23-1/+1
| | | | | | | | | | | | No need to skip a byte as the symbol table handles this. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: mark bfin_reset staticMike Frysinger2009-03-23-1/+1
| | | | | | | | | | | | The function is only used locally, so mark it static. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: fix jtag console tstcMike Frysinger2009-03-23-4/+11
| | | | | | | | | | | | | | | | | | | | The jtag tstc operation was checking the hardware to see if data is available from it (which is fine for the jtag getc operation), but the higher layers need to know whether any data is available. Since we have to read up to 4 bytes at a time from the hardware, the higher layers need to know they can consume the cached bytes as well. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'mimc200'Haavard Skinnemoen2009-03-23-321/+432
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| * AVR32: Make cacheflush cpu-dependentOlav Morken2009-02-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * Merge branch 'cleanups' into nextHaavard Skinnemoen2009-02-23-320/+431
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| | * Merge branch 'fixes' into cleanupsHaavard Skinnemoen2008-12-17-7169/+7620
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
| | * | avr32: Add support for "GPIO" port muxHaavard Skinnemoen2008-09-01-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "GPIO" port mux is used on AVR32 UC3 parts as well as AT32AP7200 and all later AVR32 chips. This patch adds a driver for it, implementing the same API as the existing portmux-pio driver but with more functionality. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | avr32: Use board_postclk_init instead of gclk_initHaavard Skinnemoen2008-09-01-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific gclk_init() board hook with the standard board_postclk_init() hook which is supposed to run at the same point during initialization. Provide a dummy weak alias for boards not implementing this hook. The cost of this is: - 2 bytes for the dummy function (retal 0) - 2 bytes for each unnecessary function call (short rcall) which is a pretty small price to pay for avoiding lots of #ifdef clutter. In this particular case, all boards probably end up slightly smaller because we avoid the conditional checking if the gclk_init symbol is NULL. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | avr32: Add gclk helper functionsHaavard Skinnemoen2008-09-01-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two helper functions for configuring and enabling generic clocks: - gclk_enable_output: Enables output on a GCLKx pin - gclk_set_rate: Configures a gclk to run at a specific rate This should eliminate any reason to go mucking about with PM registers from board code. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-317/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* | | | Add support for the digsy MTC board.Grzegorz Bernacki2009-03-20-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | This is the InterControl custom device based on the MPC5200B chip. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | | ppc4xx: Don't write the MAC address into the internal SoC registersStefan Roese2009-03-20-28/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove this code. It's not needed. The 4xx EMAC driver stores the MAC addresses into the SoC registers instead. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | Add basic relocation to i386 portGraeme Russ2009-03-20-2/+43
| | | | | | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | | | Implement SC520 timersGraeme Russ2009-03-20-243/+41
| | | | | | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
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