| Commit message (Collapse) | Author | Age | Lines |
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Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered.
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The L2 cache size is 512KB for 8568, print out the correct informaiton.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Fix the following warnings:
- usb.c:xx: warning: function declaration isn't a prototype
- usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
from pointer wihtout a cast
Signed-off-by: Martin Krause <martin.krase@tqs.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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from cpu_init() to uart_gpio_conf()
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
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interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Replaced immap_5329.h and m5329.h with immap.h. Removed whitespaces.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Replaced immap_5329.h and m5329.h with immap.h. Enabled icache_enable() in cpu_init_r().
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Added board/freescale/m5329evb, cpu/mcf532x, drivers/net,
drivers/serial, immap_5329.h, m5329.h, mcfrtc.h,
include/configs/M5329EVB.h, lib_m68k/interrupts.c, and
rtc/mcfrtc.c
Modified CREDITS, MAKEFILE, Makefile, README, common/cmd_bdinfo.c,
common/cmd_mii.c, include/asm-m68k/byteorder.h, include/asm-m68k/fec.h,
include/asm-m68k/io.h, include/asm-m68k/mcftimer.h,
include/asm-m68k/mcfuart.h, include/asm-m68k/ptrace.h,
include/asm-m68k/u-boot.h, lib_m68k/Makefile, lib_m68k/board.c,
lib_m68k/time.c, net/eth.c and rtc/Makefile
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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introduced in the implement board_add_ram_info patch as I was cleaning out the
magic numbers. sorry.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:
DRAM: 256 MB (DDR1, 64-bit, ECC on)
and for boards with SDRAM on the local bus, a line such as this is
added:
SDRAM: 64 MB (local bus)
also replaced some magic numbers with their equivalent define names.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.
Boards remain compatible with OF_FLAT_TREE.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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also adds common prototypes to include/common.h.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly. This patch also adds a /memory node if
it doesn't already exist prior to update.
plus some cosmetic trimming to single line comments.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.
this consequently eliminates CONFIG_ADD_RAM_INFO.
Thanks to Stefan for the hint.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: John Otken <john@softadvances.com>
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This patch was originall provided by David Mitchell <dmitchell@amcc.com>
and fixes a bug in the PLL clock calculation.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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During config transactions on the PCIe bus an attempt to scan for a
non-existent device can lead to a machine check exception with certain
peripheral devices. In order to avoid crashing in such scenarios the
instrumented versions of the config cycle read routines are introduced, so
the exceptions fixups framework can gracefully recover.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
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This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
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Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)
Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)
Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map
Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
support non default, boardspecific DDR(2) controller configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
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The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.
Signed-off-by: Stefan Roese <sr@denx.de>
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