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* ep93xx timer: Fix resolution of get_ticks()Matthias Kaehlcke2010-03-13-6/+9
| | | | | | | ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution, as announced by get_tbclk() Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
* ep93xx timer: Fix possible overflow in usecs_to_ticks()Matthias Kaehlcke2010-03-13-12/+4
| | | | | | | ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid overflows in intermediate values Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
* S5PC100: Function to configure the SROMC registers.Naveen Krishna CH2010-03-13-0/+54
| | | | | | | | | Nand Flash, Ethernet, other features might need to configure the SROMC registers accordingly. The config_sromc() functions helps with this. Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* s5pc1xx: support the GPIO interfaceMinkyu Kang2010-03-13-0/+144
| | | | | | This patch adds support the GPIO interface Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* s3c64xx: Add ifdef at the S3C64XX only codesJoonyoung Shim2010-03-13-0/+6
| | | | | | | | | The s3c6400.h file is only for S3C64XX cpu and the pheripheral port address(0x70000000 - 0x7fffffff) exists at only S3C64XX cpu, so they should be included by only S3C64XX cpu. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5PC100: Moves the Macros to a common header fileNaveen Krishna CH2010-03-13-6/+1
| | | | | | | | | | | The get_pll_clk(int) API returns the PLL frequency based on the (int) argument which is defined locally in clock.c Moving that #define to common header file (clk.h) would be helpful when using the API from other files. Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* updates the at91 main_clock calculationJens Scharsig2010-03-07-3/+4
| | | | | | | * updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access * add need register flags Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* MX51: removed warnings for the mx51evkStefano Babic2010-03-07-3/+10
| | | | | | | | | | | The patch removes warnings at compile time and provides some cleanup code: - Removed comment on NAND (not yet supported) from lowlevel_init.S - Removed NFMS bit definition from imx-regs.h The bit is only related to MX.25/35 and can lead to confusion - Moved is_soc_rev() to soc specific code (removed from mx51evk.c) Signed-off-by: Stefano Babic <sbabic@denx.de>
* fec_mxc: cleanup and factor out MX27 dependenciesJohn Rigby2010-03-07-0/+5
| | | | | | | | | | | | | general cleanup move clock init to cpu_eth_init in cpu/arm926ejs/mx27/generic.c make MX27 specific phy init conditional on CONFIG_MX27 replace call to imx_get_ahbclk with one to imx_get_fecclk and define imx_get_fecclk in include/asm-arm/arch-mx27/clock.h Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Ben Warren <biggerbadderben@gmail.com> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
* Add support for Freescale MX25 SOCJohn Rigby2010-03-07-0/+552
| | | | | | | | | ARM926EJS core with MX31 peripherals. Signed-off-by: John Rigby <jcrigby@gmail.com> Earlier Version Signed-off-by: Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
* fsl_esdhc: add support for mx51 processorStefano Babic2010-03-07-1/+39
| | | | | | | | | The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX51: Add initial support for the Freescale MX51Stefano Babic2010-03-07-0/+1084
| | | | | | | | The patch add initial support for the Freescale i.MX51 processor (family arm cortex_a8). Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fred Fan <fanyefeng@gmail.com>
* Add bootcount to AT91Anders Darander2010-03-07-0/+34
| | | | | | | Use AT91_GPBR 3 as a bootcount register. The bootmagic and the bootcount shares AT91_GPBR 3. Signed-off-by: Anders Darander <ad@datarespons.se>
* ep93xx: Refactoring of timer codeMatthias Kaehlcke2010-03-07-44/+26
| | | | | | | | | | | | | ep93xx: Refactoring of the timer code, including the following changes * use a free running timer instead of a periodical one * use unsigned long long for total number of ticks * hold the timer state in a structure instead of separate variables * increment the timer counter instead of decrementing it * remove unused function udelay_masked() * remove unused function set_timer() Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
* ep93xx: Fix calculation of sys ticks in clk_to_systicks()Matthias Kaehlcke2010-03-07-2/+4
| | | | | | | ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks() for proper handling of large intermediate values Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
* OMAP3: workaround for ARM Cortex-A8 erratum 725233Siarhei Siamashka2010-03-07-0/+6
| | | | | | | | | | | | | | | | | | | | | | 725233: PLD instructions executed with PLD data forwarding enabled can result in a processor deadlock This deadlock can happen when NEON load instructions are used together with cache preload instructions (PLD). The problematic conditions can be triggered in-the-wild by NEON optimized functions from pixman library (http://cgit.freedesktop.org/pixman), which perform dynamic adjustment of prefetch distance. The workaround disables PLD data forwarding by setting PLD_FWD bit in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8 errata list. The deadlock can only happen on r1pX revisions of Cortex-A8 (used in OMAP34xx/OMAP35xx). Performance impact of the workaround is practically non-existant. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM change name of defines for AT91 arm926ejsAchim Ehrlich2010-03-07-5/+5
| | | | | | | | | | Configuration defines should be preceeded with CONFIG_SYS_. Renamed some at91 specific defines to conform to this naming convention: AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
* Merge branch 'next' of git://git.denx.de/u-boot-coldfireWolfgang Denk2010-03-04-1/+47
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| * allow MCF532x to use CONFIG_MONITOR_IS_IN_RAMWolfgang Wegner2010-03-04-0/+7
| | | | | | | | | | | | | | | | | | | | | | CONFIG_MONITOR_IS_IN_RAM is broken for MCF532x. This patch fixes this by conditionally - removing the vector table at the beginning of code - not overwriting the vector base register - removing the code to re-set the PLL, which effectively disables SDRAM access Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
| * MCF5271-only: Added a weak board_reset function to allow custom resetRichard Retanubun2010-03-04-0/+39
| | | | | | | | | | | | | | | | | | | | | | This patch adds a board_reset function to allow boards to specify their own custom reset sequence (e.g. resetting by timing out watchdog). Tested only on MCF5271, can be expanded if needed. Based on Mike Frysinger's suggestion on: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/70304 Signed-off-by: Richard Retanubun <RichardRetanubun at RuggedCom.com>
| * MCF532x: make icache_enable use CONFIG_SYS_SDRAM_SIZEWolfgang Wegner2010-03-04-1/+1
| | | | | | | | | | | | | | | | in cpu/mcf532x/start.S, the function icache_enable enables the cache for a fixed 32MB region starting at the SDRAM start address; this patch changes the function to cover the region defined by CONFIG_SYS_SDRAM_SIZE Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
* | Bug: do_reset issued via netconsole does not reset mpc83xx cpu.Michael Zaidman2010-02-18-5/+3
|/ | | | | | | | | | | | The do_reset routine in the cpu/mpc83xx/cpu.c file does not reset the mpc83xx cpu when issued via netconsole. Moving the console output "resetting the board." to the beginning of the routine before disabling interrupts solved the problem. Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* prepare joining at91rm9200 into at91Jens Scharsig2010-02-12-0/+437
| | | | | | | | | | | | * prepare joining at91 and at91rm9200 * add modified copy of soc files to cpu/arm920t/at91 to make possible to compile at91rm9200 boards in at91 tree instead of at91rm9200 * add header files with c structure defs for AT91 MC, ST and TC * the new cpu files are using at91 c structure soc access * please read README.soc-at91 for details Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* convert common files to new SoC accessJens Scharsig2010-02-12-121/+208
| | | | | | | | * add's a warning to all files, which need update to new SoC access * convert common files in cpu/../at91 and a lot of drivers to use c stucture SoC access Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* convert all at91 files to use at91_gpio driver syntaxJens Scharsig2010-02-12-249/+249
| | | | | | | | | * convert all files cpu/../at91 to use at91_gpio driver syntax * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2 this makes all 160 AT91_PINPxxx defines obsolete * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* OMAP3: Avoid re-write to PRM_CLKSRC_CTRLSanjeev Premi2010-02-12-4/+16
| | | | | | | | | | | | | | | | | | | In function get_osc_clk_speed(), do not change/ update the divider for SYS_CLK as it can has cascading effect on the other derived clocks. Sudden change in divider value can lead to inconsistent behavior in the system - often leading to crashes. The problem was found when working with OMAP3EVM using DM3730 processor card. The patch has been tested with OMAP3530 on OMAP3EVM as well Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Hiremath Vaibhav <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: Add support for EP93xx SoCsMatthias Kaehlcke2010-02-12-0/+610
| | | | | | | Add support for the Cirrus EP93xx platform Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Acked-by: Tom <Tom.Rix@windriver.com>
* kgdb: cpu/mpc* cpu/74xx: include kgdb.h when neededMike Frysinger2010-02-08-0/+10
| | | | | | | | Commit cbb0cab1d929839d broke some platforms which used kgdb code but didn't actually include kgdb.h. So include kgdb.h in all the relevant traps code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-02-03-0/+1
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| * ppc4xx: Fix compilation error on ML2 boardStefan Roese2010-02-03-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently this compilation error occurs: Configuring for ML2 board... traps.c: In function 'MachineCheckException': traps.c:159: error: 'debugger_exception_handler' undeclared (first use in this function) traps.c:159: error: (Each undeclared identifier is reported only once traps.c:159: error: for each function it appears in.) This patch now fixes it by including kgdb.h Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-02-03-4/+3
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| * | new at91_emac network driver (NET_MULTI api)Jens Scharsig2010-01-31-4/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | * add's at91_emac (AT91RM9200) network driver (NET_MULTI api) * enable driver with CONFIG_DRIVER_AT91EMAC * generic PHY initialization * modify AT91RM9200 boards to use NET_MULTI driver * the drivers has been tested with LXT971 Phy and DM9161 Phy at MII and RMII interface Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2010-02-03-1/+41
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| * | arm926ejs: add nand_spl boot supportJohn Rigby2010-01-27-1/+41
| |/ | | | | | | | | | | | | | | | | | | Add CONFIG_PRELOADER/CONFIG_NAND_SPL support for nand booting to arm926ejs/start.S This is derived from CONFIG_PRELOADER support in arm1136/start.S Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Scott Wood <scottwood@freescale.com>
* | mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'Wolfgang Denk2010-02-03-5/+7
| | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* | mpc5xxx/cpu_init.c: fix warning: unused variable 'gpt0'Wolfgang Denk2010-02-03-0/+3
|/ | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* 85xx: Add support for 'cpu disable' commandKumar Gala2010-01-26-2/+26
| | | | | | Support disabling of a core via user command 'cpu disable'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Add support for 'cpu disable' commandKumar Gala2010-01-26-2/+16
| | | | | | Support disabling of a core via user command 'cpu disable'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Add support to disable cpu's in multicore processorsKumar Gala2010-01-26-1/+35
| | | | | | | | | | | Add a disable sub-command to the cpu command that allows for disabling cores in multicore processors. This can be useful for systems that are using multicore chips but aren't utilizing all the cores as a way to reduce power and possibly improve performance. Also updated an added missing copyright. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-01-26-9/+32
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| * qe: fixup the snum for MPC8569 Rev2.0Liu Yu2010-01-25-0/+18
| | | | | | | | | | | | | | | | Since 1.0 and 2.0 use different snum table, we fixup the snum value according to SPRN_SVR. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Fix the local bus divider mappingDave Liu2010-01-25-1/+6
| | | | | | | | | | | | | | | | The real clock divider is 4 times of the bits LCRR[CLKDIV], according the latest RevF RM. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"Kumar Gala2010-01-25-6/+6
| | | | | | | | | | | | | | | | | | This reverts commit bc20f9a9527afe8ae406a74f74765d4323f04922. The original code was correct. I clearly need glasses or a brown paper bag. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RATJames Yang2010-01-25-2/+2
| | | | | | | | | | | | | | | | The masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits instead of 4. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ppc: remove -ffixed-r14 gcc option.Joakim Tjernlund2010-01-26-12/+12
| | | | | | | | | | | | This is no loger needed, free up r14 for general usage. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | ppc: Use r12 instead of r14 as GOT pointer.Joakim Tjernlund2010-01-26-61/+75
| | | | | | | | | | | | | | | | r14 is not supposed to be clobbered by functions. Switch to r12 and call GET_GOT when needed. This will allow u-boot to loose the -ffixed-r14 gcc option. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | ppc: Loose GOT access in IRQJoakim Tjernlund2010-01-26-382/+36
|/ | | | | | | | Using the GOT in IRQ handlers requires r14 to be -ffixed-r14. Avoid this by relocatate transfer_to_handler too. This will allow to free up r14 later on. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* mpc5xxx: Support CPU internal watchdog.Detlev Zundel2010-01-25-2/+32
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* mpc512x: Add display of reset status registerDetlev Zundel2010-01-24-2/+3
| | | | | | | | Content of the RSR is put into gd early so we can output it together with the CPU info. The clearing of gd in board_init_f is redundant for this architecture as it is done in cpu_init_f so we remove it. Signed-off-by: Detlev Zundel <dzu@denx.de>
* SPEAr : Adding basic SPEAr architecture support.Vipin KUMAR2010-01-23-0/+259
| | | | | | | | | | SPEAr Architecture support added. It contains the support for following SPEAr blocks - Timer - System controller - Misc registers Signed-off-by: Vipin <vipin.kumar@st.com>
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