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* 85xx: Improve MPIC initializationTimur Tabi2009-08-28-5/+7
| | | | | | | | | The MPIC initialization code for Freescale e500 CPUs was not using I/O accessors, and it was not issuing a read-back to the MPIC after setting mixed mode. This may be the cause of a spurious interrupt on some systems. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added single core members of FSL P1xx/P2xx processors seriesPoonam Aggrwal2009-08-28-3/+9
| | | | | | | | P1011 - Single core variant of P1020 P2010 - Single core variant of P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add L2SRAM Register's macro definitionMingkai Hu2009-08-28-2/+3
| | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Move to a common linker scriptKumar Gala2009-08-28-0/+146
| | | | | | | | There are really no differences between all the 85xx linker scripts so we can just move to a single common one. Board code is still able to override the common one if need be. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added P1020 Processor Support.Poonam Aggrwal2009-08-28-1/+4
| | | | | | | | | | | | | | P1020 is another member of QorIQ series of processors which falls in ULE category. It is an e500 based dual core SOC. Being a scaled down version of P2020 it has following differences: - 533MHz - 800MHz core frequency. - 256Kbyte L2 cache - Ethernet controllers with classification capabilities. Also the SOC is pin compatible with P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal2009-08-28-57/+106
| | | | | | | | | | | | | The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Refactored common cpu specific code for 85xx/86xx into one file.Poonam Aggrwal2009-08-28-100/+133
| | | | | | | | Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c and moved to cpu/mpc8xxx/cpu.c(new file) Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala2009-08-28-1/+2
| | | | | | | | | | | | For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 However these are all captured in the config.h and thus redudant. Also moved common 86xx flags into cpu/mpc86xx/config.mk. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala2009-08-28-2/+1
| | | | | | | | | | | | | For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 However these are all captured in the config.h and thus redudant. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ColdFire: Fix compile warning messagesTsiChung Liew2009-08-26-2/+0
| | | | | | | | | Change %08lX to %08X in board.c. Remove unused variable 'oscillator' in mcf5227x/cpu_init.c and 'scm2' in mcf532x/cpu_init.c. Provide argument type cast in drivers/dma/MCD_dmaApi.c. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
* Add support for USB on PSC3 for the mpc5200Eric Millbrandt2009-08-25-2/+10
| | | | | | | | | | | Support USB on PSC3 on the mpc5200. Before this patch, enabling USB support would reconfigure PSC4 and PSC5 to USB. The mpc5200 does not support USB enabled on both the standard USB port and PSC3. This patch masks the appropriate bits when enabling USB. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Remy Bohmer <linux@bohmer.net>
* Prepare 2009.08-rc3v2009.08-rc3Wolfgang Denk2009-08-22-1/+1
| | | | | | Update CHANGELOG, minor Coding Style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: compiler options cleanup - improve tool chain supportWolfgang Denk2009-08-21-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some time there have been repeated reports about build problems with some ARM (cross) tool chains. Especially issues about (in)compatibility with the tool chain provided runtime support library libgcc.a caused to add and support a private implementation of such runtime support code in U-Boot. A closer look at the code indicated that some of these issues are actually home-made. This patch attempts to clean up some of the most obvious problems and make building of U-Boot with different tool chains easier: - Even though all ARM systems basicy used the same compiler options to select a specific ABI from the tool chain, the code for this was distributed over all cpu/*/config.mk files. We move this one level up into lib_arm/config.mk instead. - So far, we only checked if "-mapcs-32" was supported by the tool chain; if yes, this was used, if not, "-mabi=apcs-gnu" was selected, no matter if the tool chain actually understood this option. There was no support for EABI conformant tool chains. This patch implements the following logic: 1) If the tool chain supports "-mabi=aapcs-linux -mno-thumb-interwork" we use these options (EABI conformant tool chain). 2) Otherwise, we check first if "-mapcs-32" is supported, and then check for "-mabi=apcs-gnu" If one test succeeds, we use the first found option. 3) In case 2), we also test if "-mno-thumb-interwork", and use this if the test succeeds. [For "-mabi=aapcs-linux" we set "-mno-thumb-interwork" mandatorily.] This way we use a similar logic for the compile options as the Linux kernel does. - Some EABI conformant tool chains cause external references to utility functions like raise(); such functions are provided in the new file lib_arm/eabi_compat.c Note that lib_arm/config.mk gets parsed several times, so we must make sure to add eabi_compat.o only once to the linker list. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Dirk Behme <dirk.behme@googlemail.com> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Tested-by: Magnus Lilja <lilja.magnus@gmail.com> Tested-by: Andrzej Wolski <awolski@poczta.fm> Tested-by: Gaye Abdoulaye Walsimou <walsimou@walsimou.com> Tested-by: Tom Rix <Tom.Rix@windriver.com> Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 85xx: Fix addrmap to include memoryKumar Gala2009-08-14-6/+22
| | | | | | | | | | | | | | When we init the addrmap based on the TLB we will not end up getting the TLB that covers memory if we are using SPD. The reason is we haven't relocated at the point that we setup the memory TLB and thus it will not get setup in the addrmap. Instead we can just walk over the TLB array after we've relocated and see all the TLBs that have been set and use that information to populate the initial addrmap. By doing this we insure that we get the TLB entries that cover memory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Minor coding style cleanup.Wolfgang Denk2009-08-10-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM Cortex A8: Remove bogus config.mk entriesDirk Behme2009-08-10-38/+1
| | | | | | | Remove bogus config.mk entry, fix newline and remove redundant omap3/config.mk Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* mxc-mmc: sdhc host driver for MX2 and MX3 proccessorIlya Yanok2009-08-09-0/+16
| | | | | | | | | | This is a port of Linux driver for SDHC host controller hardware found on Freescale's MX2 and MX3 processors. Uses new generic MMC framework (CONFIG_GENERIC_MMC) and it looks like there are some problems with a framework (at least on LE cpus). Some of these problems are addressed in the following patches. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* Dual-license IBM code contributionsJosh Boyer2009-08-09-0/+14
| | | | | | | | | | | | | It was brought to our attention that U-Boot contains code derived from the IBM OpenBIOS source code originally provided with some of the older PowerPC 4xx development boards. As a result, the original license of this code has been carried in the various files for a number of years in the U-Boot project. IBM is dual-licensing the IBM code contributions already present in U-Boot under either the terms of the GNU General Public License version 2, or the original code license already present. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* omap3: bug fix for NOR boot supportPenda Naveen Kumar2009-08-08-4/+4
| | | | | | | This patch provides bug fix, when omap3 uses nor boot. Signed-off-by: Penda Naveen Kumar<pnaveen@ti.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: replace all instances of gpmc config struct by one globalDirk Behme2009-08-08-13/+11
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: remove typedefs for configuration structsDirk Behme2009-08-08-29/+29
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: embedd gpmc_cs into gpmc config structMatthias Ludwig2009-08-07-22/+15
| | | | | | | | | Embedd chip select configuration into struct for gpmc config instead of having it completely separated as suggested by Wolfgang Denk on http://lists.denx.de/pipermail/u-boot/2009-May/052247.html Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
* Merge branch 'next' of git://git.denx.de/u-boot-coldfireWolfgang Denk2009-08-04-545/+372
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| * ColdFire: Add DSPI support for MCF5227x and MCF5445xTsiChung Liew2009-07-14-500/+121
| | | | | | | | | | | | | | | | Remove individual CPU specific DSPI driver. Add required feature for the common DSPI driver in cpu_init and in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| * ColdFire: Add M5208EVB and MCF520x CPU supportTsiChung Liew2009-07-14-14/+199
| | | | | | | | Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| * ColdFire: Update for M54451EVBTsiChung Liew2009-07-14-35/+56
| | | | | | | | | | | | | | | | Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
* | rm9200 lowevel_init: don't touch reserved/readonly registersDavid Brownell2009-08-03-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reason the AT91rm9200 lowlevel init writes to a bunch of reserved or read-only addresses. All the boards seem to define the value-to-be-written values as zero ... but they shouldn't actually be writing *anything* there. No documented erratum justifies these accesses. It looks like maybe some pre-release BDI-2000 setup code has been carried along by cargo cult programming since at least late 2004 (per GIT history). Here's a patch disabling what seems to be bogosity. Tested on a csb337; there were no behavioral changes. Signed-off-by: David Brownell <david-b@pacbell.net> on RM9200ek Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Add AT91SAM9260 to at91's lowlevel_init.SEric Benard2009-08-01-1/+1
| | | | | | | | | | | | Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260. Signed-off-by: Eric Benard <eric@eukrea.com>
* | ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chipsStefan Roese2009-07-30-0/+23
| | | | | | | | | | | | | | This patch is based on a diff created by Phong Vo from AMCC. Signed-off-by: Phong Vo <pvo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-07-30-1/+100
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| * | arm nomadik: add gpio supportAlessandro Rubini2009-07-29-1/+100
| | | | | | | | | | | | | | | | | | Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-4/+4
| | | | | | | | | | | | | | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* | | mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove ↵Kim Phillips2009-07-27-2/+2
|/ / | | | | | | | | | | the former Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | cpu/arm920t/start.S: include <common.h> to have ROUND() definedWolfgang Denk2009-07-27-2/+1
| | | | | | | | | | | | | | Commit fcd3c87e made include/common.h usable by assembler code but failed to update cpu/arm920t/start.S Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Make include/common.h usable by assembler codeWolfgang Denk2009-07-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 70ebf316 factored out the ROUND() macro into include/common.h, not realizing that the primary use of this macro on AT91 systems was in start.S where common.h was not included, and could not be included because it contains a lot of C code which the assembler doesn't understand. This patch wraps such code in common.h in a "#ifndef __ASSEMBLY__" construct, and then adds an include to cpu/arm926ejs/start.S thus solving the problem. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2009-07-26-0/+95
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| * | Add AVR32 LCD supportMark Jackson2009-07-26-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AVR32 LCD controller. This patch is based off the latest u-boot-video. A quick summary of what's going on:- Enable LCDC pixel clock Enable LCDC port pins Add framebuffer pointer to global_data struct Allocate framebuffer To use the new code, update your board config to include something like this:- #define CONFIG_LCD 1 #if defined(CONFIG_LCD) #define CONFIG_CMD_BMP #define CONFIG_ATMEL_LCD 1 #define LCD_BPP LCD_COLOR16 #define CONFIG_BMP_16BPP 1 #define CONFIG_FB_ADDR 0x10600000 #define CONFIG_WHITE_ON_BLACK 1 #define CONFIG_VIDEO_BMP_GZIP 1 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 #define CONFIG_ATMEL_LCD_BGR555 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define CONFIG_SPLASH_SCREEN 1 #endif The standard U-Boot BMP and Splash-screen features should just work. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> [agust@denx.de: fixed some style issues] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | ppc4xx: Replace 4xx lowercase SPR referencesMatthias Fuchs2009-07-24-118/+119
| | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Add "chip_config" command for PPC4xx bootstrap configurationStefan Roese2009-07-24-0/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a generic command for programming I2C bootstrap eeproms on PPC4xx. An implementation for Canyonlands board is included. The command name is intentionally chosen not to be PPC4xx specific. This way other CPU's/SoC's can implement a similar command under the same name, perhaps with a different syntax. Usage on Canyonlands: => chip_config Available configurations (I2C address 0x52): 600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100 600-nand - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100 800-nor - NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100 800-nand - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100 1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100 1000-nand - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100 1066-nor - NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88 *** 1066-nand - NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88 => chip_config 600-nor Using configuration: 600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100 done (dump via 'i2c md 52 0.1 10') Reset the board for the changes to take effect Other 4xx boards will be migrated to use this command soon as well. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Dirk Eibach <eibach@gdsys.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | ppc4xx: Fix missing freqOPB for 405EPDirk Eibach2009-07-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | In cpu/ppc4xx/speed.c initialization of sysInfo->freqOPB for 405EP was left out for no obvious reason. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: Fix TLB reset problem with recent 44x imagesStefan Roese2009-07-24-2/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal" booting on some 44x platforms. This breakage is only noticed in some cases while powercycling. As it seems, the code in question in start.S didn't invalidate TLB #0. This makes sense since this TLB is used for the bootrom mapping. With the patch mentioned above even TLB #0 got invalidated resulting in an error later on. This patch now fixes this issue by only invalidating TLB #0 in the RAM- booting case. Tested succesfully on Sequoia and Canyonlands. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <Eibach@gdsys.de>
* | unify HOST_CFLAGS and HOSTCFLAGSMike Frysinger2009-07-23-1/+1
| | | | | | | | | | | | | | | | The top build system sets up HOSTCFLAGS a bit and exports it, but other places use HOST_CFLAGS instead. Unify the two as HOSTCFLAGS so that the values stay in sync. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | fec_mxc: driver for FEC ethernet controller on i.MX27Ilya Yanok2009-07-22-0/+10
| | | | | | | | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | rm9200 ethernet driver: board-specific quirk (csb337)David Brownell2009-07-22-4/+18
| | | | | | | | | | | | | | | | | | | | | | CSB337 boards originally shipped with MicroMonitor, not U-Boot; and with a version using a different convention for recording Ethernet addresses than anyone else. To avoid breaking Linux when it uses U-Boot, have it use the same convention on that hardware. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-23-14/+37
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| * | ARM Cortex A8: Move OMAP3 specific reset handlerMinkyu Kang2009-07-22-14/+37
| | | | | | | | | | | | | | | | | | | | | Because of the reset_cpu is soc specific, should be move to soc Cc: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | 85xx, 86xx: Add common board_add_ram_info()Peter Tyser2009-07-22-41/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, 85xx and 86xx boards would display DRAM information on bootup such as: ... I2C: ready DRAM: Memory controller interleaving enabled: Bank interleaving! 2 GB FLASH: 256 MB ... This patch moves the printing of the DRAM controller configuration to a common board_add_ram_info() function which prints out DDR type, width, CAS latency, and ECC mode. It also makes the DDR interleaving information print out in a more sane manner: ... I2C: ready DRAM: 2 GB (DDR2, 64-bit, CL=4, ECC on) DDR Controller Interleaving Mode: bank FLASH: 256 MB ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fieldsPeter Tyser2009-07-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Blackfin: split cpu COBJS into multilinesMike Frysinger2009-07-18-1/+7
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Blackfin: add os log functionsMike Frysinger2009-07-18-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | Part of the mini Blackfin ABI with operating systems is that they can use 0x4f0-0x4f8 to pass log buffers to/from bootloaders. So add support to U-Boot for reading the log buffer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
generated by cgit v1.1 at 2024-12-29 18:32:17 +0000