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* General help message cleanupWolfgang Denk2009-06-12-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the help messages were not really helpful; for example, many commands that take no arguments would not print a correct synopsis line, but "No additional help available." which is not exactly wrong, but not helpful either. Commit ``Make "usage" messages more helpful.'' changed this partially. But it also became clear that lots of "Usage" and "Help" messages (fields "usage" and "help" in struct cmd_tbl_s respective) were actually redundant. This patch cleans this up - for example: Before: => help dtt dtt - Digital Thermometer and Thermostat Usage: dtt - Read temperature from digital thermometer and thermostat. After: => help dtt dtt - Read temperature from Digital Thermometer and Thermostat Usage: dtt Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add support for Linux-like kallsysmsMike Frysinger2009-06-12-48/+5
| | | | | | | The kernel stores address<->symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* OMAP3 Turn on the GPIO bank clocksTom Rix2009-06-12-0/+22
| | | | | | | | | The function and interface clocks for each GPIO bank, except the first, must be explicitly turned on. These are controlled by the config level defines CONFIG_OMAP3_GPIO_n where n is from 2 to 6. Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* at91: move cpu info print to cpuJean-Christophe PLAGNIOL-VILLARD2009-06-12-5/+22
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: extract reset from timerJean-Christophe PLAGNIOL-VILLARD2009-06-12-15/+43
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* omap24xx: rename reset fileJean-Christophe PLAGNIOL-VILLARD2009-06-12-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* lh7a40x: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-06-12-185/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* pxa: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-06-12-386/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: remove cpu_initJean-Christophe PLAGNIOL-VILLARD2009-06-12-66/+1
| | | | | | move s3c44b0 to arch_cpu_init and as noone use cpu_init remove it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: unify interrupt initJean-Christophe PLAGNIOL-VILLARD2009-06-12-128/+2
| | | | | | | all arm init the IRQ stack the same way so unify it in lib_arm/interrupts.c and then call arch specific interrupt init Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: unify linker scriptJean-Christophe PLAGNIOL-VILLARD2009-06-12-12/+648
| | | | | | | | | | | | all arm boards except a few use the same cpu linker script so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* afeb9260: fix macb device initJean-Christophe PLAGNIOL-VILLARD2009-06-12-1/+1
| | | | | | uses PA10, PA11 for ETX2 and ETX3. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc4xx: Remove PCI async bootup message if PCI is not usedStefan Roese2009-06-12-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ARM DaVinci: Reset with watchdog enabledThomas Lange2009-06-12-0/+4
| | | | | | | | | Once the Davinci watchdog has been enabled, the timeout value cannot be changed. If the timeout in use is long, it can take a long time for card to reset. By writing an invalid service key, we can trigger an immediate reset. Signed-off-by: Thomas Lange <thomas@corelatus.se>
* at91: regroup IP hw init in one file per socJean-Christophe PLAGNIOL-VILLARD2009-06-12-603/+338
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* OMAP3 Port kernel omap gpio interface.Tom Rix2009-06-12-0/+186
| | | | | | | | | Port version 2.6.27 of the linux kernel's omap gpio interface to u-boot. The orignal source is in linux/arch/arm/plat-omap/gpio.c See doc/README.omap3 for instructions on use. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* ARM DaVinci:Consolidate common u-boot.ldsSandeep Paulraj2009-06-12-0/+89
| | | | | | | | | The u-boot.lds is common for all DaVinci boards. The patch removes multiple instances and moves the u-boot.lds to /cpu/arm926ejs/davinci folder. This addresses one of the comments i received while submitting patches for DM3xx Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP Consolidate common u-boot.lds to cpu layer.Tom Rix2009-06-12-0/+60
| | | | | | | The u-boot.lds file is common for all omap boards. Move a cleaned up version to the cpu layer and add makefile logic to use it. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* arm920/926/926: remove non needed headerJean-Christophe PLAGNIOL-VILLARD2009-06-12-13/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* davinci: display correct clock infoDavid Brownell2009-06-12-1/+132
| | | | | | | | | | | | Move the clock-rate dumping code into the cpu/.../davinci area where it should have been, enabled by CONFIG_DISPLAY_CPUINFO, updating the format and showing the DSP clock (where relevant). Switch boards to use the cpuinfo() hook for this stuff. Remove a few now-obsolete PLL #defines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm: timer and interrupt init reworkJean-Christophe PLAGNIOL-VILLARD2009-06-12-166/+148
| | | | | | | | | | | | | | actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow so now rename it as int timer_init(void) and use interrupt_init for interrupt btw also remane the corresponding file to the functionnality implemented as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* OMAP3: Reorganize Makefile styleJean-Christophe PLAGNIOL-VILLARD2009-06-12-1/+7
| | | | | | | Reformat COBJS handling. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* OMAP3: Remove dublicated interrupt codeJean-Christophe PLAGNIOL-VILLARD2009-06-12-128/+0
| | | | | | | | Remove duplicated interrupt code. Original, identical code can be found in lib_arm/interrupts.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* at91rm9200: move reset code to reset.cJean-Christophe PLAGNIOL-VILLARD2009-06-12-40/+82
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ixp/interrupts: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2009-06-12-9/+2
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: cleanup remaining CONFIG_INIT_CRITICALJean-Christophe PLAGNIOL-VILLARD2009-06-12-2/+6
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm946es: remove non used timerJean-Christophe PLAGNIOL-VILLARD2009-06-12-159/+2
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* davinci: add basic dm355/dm350/dm335 supportDavid Brownell2009-06-12-0/+46
| | | | | | | | | | | | | Add some basic declarations for DaVinci DM355/DM350/DM335 support, keyed on CONFIG_SOC_DM355. (DM35X isn't quite right because the DM357 is very different; while the DM355 is like a DM355 without the MPEG/JPEG coprocessor). These have different peripherals than the DM6446, and some of the peripherals are at different addresses. Notably for U-Boot, there's no EMAC, and the NAND controller address is different Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: fix dm644x bugletsDavid Brownell2009-06-12-1/+3
| | | | | | | | Fix two buglets in the dm644x support: don't set two must-be-zero bits in the UART management register; and only include the I2C hooks if the I2C driver is being included. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: split out some dm644x-specific bits from pscDavid Brownell2009-06-12-75/+123
| | | | | | | | | | | | | | Split out DaVinci DM6446-specific bits from more generic bits: - Add a CONFIG_SOC_DM644X. All current boards use DM6446 chips; DM6443 and DM6441 chips differ in available peripherals. - Move most DM644X-specific bits from psc.c to a new dm644x.c file, which is conditionally built. It provides device-specific setup. Plus minor coding style and comment updates with respect to the PSC. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: cpu-specific build uses conditional make syntaxDavid Brownell2009-06-12-3/+5
| | | | | | | | | | | Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax. Add the first conditional: for EMAC driver support. Not all chips have an EMAC; and boards might not use it, anyway. This doesn't touch PHY configuration; that should eventually become conditional too. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: move psc support board-->cpuDavid Brownell2009-06-12-1/+183
| | | | | | | | Move DaVinci PSC support from board/* to cpu/* where it belongs. The PSC module manages clocks and resets for all DaVinci-family SoCs, and isn't at all board-specific. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* DaVinci now respects SKIP_LOWLEVEL_INITDavid Brownell2009-06-12-1/+5
| | | | | | | | Don't needlessly include lowlevel init code; that's only really needed with boot-from NOR (not boot-from-NAND). The 2nd stage loader (UBL) handles that before it loads U-Boot. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ppc4xx: Add Sequoia RAM-booting targetStefan Roese2009-06-12-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds another build target for the AMCC Sequoia PPC440EPx eval board. This RAM-booting version is targeted for boards without NOR FLASH (NAND booting) which need a possibility to initially program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000) configured to setup the SDRAM, this debugger can load this RAM- booting image to the target address in SDRAM (in this case 0x1000000) and start it there. Then U-Boot's standard NAND commands can be used to program the NAND FLASH (e.g. "nand write ..."). Here the commands to load and start this image from the BDI2000: 440EPX>reset halt 440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin 440EPX>go 0x1000000 Please note that this image automatically scans for an already initialized SDRAM TLB (detected by EPN=0). This TLB will not be cleared. This TLB doesn't need to be TLB #0, this RAM-booting version will detect it and preserve it. So booting via BDI2000 will work and booting with a complete different TLB init via U-Boot works as well. Signed-off-by: Stefan Roese <sr@denx.de>
* i2c: Create common default i2c_[set|get]_bus_speed() functionsPeter Tyser2009-06-12-51/+0
| | | | | | | | | | | | | New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions replace a number of architecture-specific implementations. Also, providing default functions will allow all boards to enable CONFIG_I2C_CMD_TREE. This was previously not possible since the tree-form of the i2c command provides the ability to display and modify the i2c bus speed which requires i2c_[set|get]_bus_speed() to be present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE valuePeter Tyser2009-06-12-11/+0
| | | | | | | | Many boards/controllers/drivers don't support an I2C slave interface, however CONFIG_SYS_I2C_SLAVE is used in common code so provide a default Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BITKumar Gala2009-06-12-39/+41
| | | | | | | | | | | | | | | The ddr code computes most things as 64-bit quantities and had some places in the middle that it was using phy_addr_t and phys_size_t. Instead we use unsigned long long through out and only at the last stage of setting the LAWs and reporting the amount of memory to the board code do we truncate down to what we can cover via phys_size_t. This has the added benefit that the DDR controller itself is always setup the same way regardless of how much memory we have. Its only the LAW setup that limits what is visible to the system. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala2009-06-12-1/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* at91/cpu.c: add missing Copyright & GPL headerJean-Christophe PLAGNIOL-VILLARD2009-06-10-0/+23
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 85xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup2009-06-09-1/+1
| | | | | | | | | | | | | The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits. This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum (256 MB) which made u-boot hang in board_init_f() when trying to create a new stack in RAM. I have an mpc8540 with one 1GB dimm. Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platformsStefan Roese2009-05-23-2/+2
| | | | | | | | | | | | | This patch now uses the correct ECC byte order (Smart Media - SMC) to be used on the 4xx NAND FLASH driver. Without this patch we have incompatible ECC byte ordering to the Linux kernel NDFC driver. Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in drivers/mtd/nand/nand_ecc.c for correct operation. This is done with a seperate patch. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* ppc4xx: Move definition for PPC4xx NAND FLASH controller to headerStefan Roese2009-05-23-6/+3
| | | | | | | | | This patch moves the definition for the PPC4xx NAND FLASH controller (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the upcoming fix for the ECC byte ordering of the NDFC driver. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* Blackfin: fix timer_init()/timer_reset()Graf Yang2009-05-19-2/+3
| | | | | | | | | | | | | The timer_init() function was not using the right csync instruction, nor was it doing it right after disabling the core timer. The timer_reset() function would reset the timestamp, but not the actual timer, so there was a common edge case where get_timer() return a jump of one timestamp (couple milliseconds) right after resetting. This caused many functions to improperly timeout right away. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* MIPS: Implement ethernet halt for au1x00Thomas Lange2009-05-16-0/+4
| | | | | | | | | Implement ethernet halt() by putting MAC0 in reset. If we do not do this, we will get memory corruption when ethernet frames are received during early OS boot. Signed-off-by: Thomas Lange <thomas@corelatus.se> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* 74xx_7xx: Fix rounding problem in CPU frequency calculationStefan Roese2009-05-15-2/+2
| | | | | | | This patch fixes a problem in the CPU frequency calculation. Without it a 798MHz CPU is displayed as 368.503 MHz. And with it it's 798 MHz. Signed-off-by: Stefan Roese <sr@denx.de>
* Fix e-mail address of Gary Jennejohn.Detlev Zundel2009-05-15-51/+51
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* MPC8260: fixup device tree by property instead of pathWolfgang Denk2009-05-15-5/+6
| | | | | | | | | | | | | | | | | | | | cpu/mpc8260/cpu.c used to use do_fixup_by_path_u32() to update the clock frequencies in the device tree, using a CPU path "/cpus/OF_CPU", with OF_CPU beind defined in the board config file. However, this does not work when one board config file (here: MPC8260ADS.h) is intended to be used for several diffrent CPUs and therefor contains a generic definition like "cpu@0", as the device trees that will then be loaded will contain specific names like "PowerPC,8272@0". We switch to using do_fixup_by_prop_u32() instead, so we can search for device_type="cpu", as it is done in other architectures, too. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
* AFEB9260 network fixSergey Lapin2009-05-13-1/+1
| | | | | | | | AFEB9260 uses PA10, PA11 for ETX2 and ETX3. Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence, not 0. Signed-off-by: Sergey Lapin <slapin@ossfans.org>
* Blackfin: avoid get_sclk() with early serial debugMike Frysinger2009-05-06-5/+5
| | | | | | | | When the clock functions were changed to use cached values (and thereby avoiding expensive math functions), early serial debug broke because the baud programming is called before external memory is available. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix booting with older bootroms (no EVT1)Mike Frysinger2009-05-06-1/+11
| | | | | | | | | | | When dropping jump block support, the assumption was that all bootroms supported entry point redirection via the EVT1 register. Unfortunately, this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2 and older and BF561). No one really noticed earlier because these parts usually are booted by bypassing the bootrom entirely, and older BF533 parts are not supported at all (too many anomalies). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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