summaryrefslogtreecommitdiff
path: root/cpu
Commit message (Expand)AuthorAgeLines
* ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scanStefan Roese2009-10-07-1/+2
* PPC4xx: Denali core: Fix incorrect DDR row bitsMike Nuss2009-10-07-1/+1
* ppc4xx: Merge PPC4xx DDR and DDR2 ECC handlingStefan Roese2009-10-02-250/+169
* ppc4xx: Reorganize DDR2 ECC handlingFelix Radensky2009-10-02-207/+249
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-09-30-80/+79
|\
| * ppc4xx: Remove mtsdram0() marcos and use common mtsdram() insteadStefan Roese2009-09-28-14/+13
| * ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper caseStefan Roese2009-09-28-65/+65
| * ppc4xx: Convert PPC4xx UIC defines from lower case to upper caseStefan Roese2009-09-28-14/+14
* | mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfieldsKim Phillips2009-09-26-107/+154
|/
* mucmc52, uc101: delete ata@3a00 node, if no CF card is detectedHeiko Schocher2009-09-25-0/+20
* mpc512x: Streamlined fixed_sdram() init sequence.Martha M Stan2009-09-25-35/+69
* ppc/p4080: Determine various chip frequencies on CoreNet platformsKumar Gala2009-09-24-4/+127
* ppc/p4080: Handle timebase enabling and frequency reportingKumar Gala2009-09-24-1/+22
* ppc/p4080: Add various p4080 related defines (and p4040)Kumar Gala2009-09-24-0/+5
* ppc/p4080: CoreNet platfrom style secondary core releaseKumar Gala2009-09-24-3/+65
* ppc/p4080: CoreNet platfrom style CCSRBAR settingKumar Gala2009-09-24-18/+54
* ppc/85xx: Fix enabling of L2 cacheKumar Gala2009-09-24-3/+4
* 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQVivek Mahajan2009-09-24-3/+10
* ppc/85xx: add cpu init config file for boot from NANDMingkai Hu2009-09-24-0/+63
* ppc/85xx: add ld script file for boot from NANDMingkai Hu2009-09-24-0/+67
* ppc4xx: Fix PCIE PLL lock on 440SPe Yucca boardRupjyoti Sarmah2009-09-23-8/+15
* ppc4xx: Consolidate get_OPB_freq()Stefan Roese2009-09-17-75/+15
* ppc4xx: Fix 405EZ uart base baud calculationStefan Roese2009-09-17-1/+5
* ppc/85xx: Disable all async interrupt sources when we bootKumar Gala2009-09-15-0/+11
* ppc/85xx: Split out cpu_init_early into its own file for NAND_SPLKumar Gala2009-09-15-51/+77
* ppc/85xx: Change cpu_init_early_f so we can use with NAND SPLKumar Gala2009-09-15-9/+25
* ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu2009-09-15-1/+181
* ppc/85xx: Move code around to prep for NAND_SPLKumar Gala2009-09-15-23/+23
* ppc/85xx: Repack tlb_table to save spaceKumar Gala2009-09-15-4/+5
* ppc/85xx: Introduce low level write_tlb functionKumar Gala2009-09-15-14/+26
* ppc/8xxx: Misc DDR related fixesKumar Gala2009-09-15-7/+7
* ppc/85xx: Remove some bogus code from external interrupt handler.Scott Wood2009-09-15-8/+1
* ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.Scott Wood2009-09-15-0/+7
* ppc/85xx: Don't enable interrupts before we're readyScott Wood2009-09-15-2/+2
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-171/+171
* ppc4xx: Fix compilation warning in 4xx miiphy.cStefan Roese2009-09-10-1/+1
* ppc4xx: Allow overwriting pci target registers for all 4xx boardsMatthias Fuchs2009-09-10-2/+2
* ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-3/+7
* ppc/85xx: Clean up do_resetKumar Gala2009-09-08-16/+9
* ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().Poonam Aggrwal2009-09-08-6/+10
* ppc/85xx/86xx: Device tree fixup for number of coresPoonam Aggrwal2009-09-08-0/+61
* ppc/85xx,86xx: Handling Unknown SOC versionPoonam Aggrwal2009-09-08-13/+7
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-0/+226
* ppc/85xx: Cleanup makefile and related optional filesKumar Gala2009-09-08-18/+19
* ppc/85xx: Fix bug in setup_mp codeKumar Gala2009-09-08-3/+29
* ppc/85xx: Add a simple function to search the TLBKumar Gala2009-09-08-0/+27
* 85xx: Add support for setting IVORs to fixed offset defaultsKumar Gala2009-09-08-0/+95
* ppc/85xx: Fix up eSDHC controller clock frequency in the device treeDipen Dudhat2009-09-08-0/+7
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-24/+0
* ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clkDipen Dudhat2009-09-08-1/+1
generated by cgit v1.1 at 2024-12-30 22:27:29 +0000