| Commit message (Collapse) | Author | Age | Lines |
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Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.
Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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This is needed on Canyonlands which still has an exception pending
while running relocate_code(). This leads to a failure after trap_init()
is moved to the top of board_init_r().
Signed-off-by: Stefan Roese <sr@denx.de>
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Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled. With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations. This means we have to distinguish between
the two in the config file. The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.
Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.
The regions for some of the mappings were far larger than they
needed to be. I have reduced the mappings to match the
actual sizes supported by the hardware.
In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them. These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.
Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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We define CONFIG_MONITOR_BASE_EARLY to define the initial location
of the bootpage in flash. Use this to create an early mapping
definition for the FLASH, and change the early_bats code to use this.
This change facilitates the relocation of the flash since the early
mappings are no longer tied to the final location of the flash.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Using a mtmsr/blr means that you have to be executing at the
same virtual address once you enable translation. This is
unnecessarily restrictive, and is not really how this is
usually done. Change it to use the more common mtspr SRR0/SRR1
and rfi method.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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In order to later allow for a physical relocation of the
flash, setup_bats, which sets up the final BAT mapping
for the board, needs to happen *after* init_laws().
Otherwise, there will be no window programmed for the flash
at the new physical location at the point when we change
the mmu translation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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We put the bootpg for the secondary cpus into memory and use
BPTR to get to it. This is a step towards converting to the
ePAPR boot methodology. Also, the code is written to
deal properly with more than 4GB of RAM.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Currently, the CCSR gets relocated while translation is
enabled, meaning we need 2 BAT translations to get to both the
old location and the new location. Also, the DEFAULT
CCSR location has a dependency on the BAT that maps the
FLASH region. Moving the relocation removes this unnecessary
dependency. This makes it easier and more intutive to
modify the board's memory map.
Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
BAT for CCSR space.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
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Also changed path in all linker scripts that reference this driver
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
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All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
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Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Affected boards:
Several MPC8xx boards
Several MPC8260/MPC8272 boards
Several MPC85xx boards
Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init
as a part of ongoing eth_initialize cleanup work. The function ret value
is also fixed as it should be negative on fail.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Also, removed the driver initialization from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: Tomohiro Masubuchi <tomohiro_masubuchi@tripeaks.co.jp>
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OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory.
It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap
Signed-off-by: Roman Mashak <romez777@gmail.com>
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The error was caused by the change for strmhz() in cpu.c.
A few of them were one extra close parenthesis.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Add serial boot support
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Place FEC pin assignments in cpu_init.c from platform's
mii.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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There were several, now there is one (two if you count the lower-case
versions).
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Some Blackfin UARTs are read-to-clear while others are write-to-clear.
This can cause problems when we poll the LSR and then later try and handle
any errors detected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We should use the algorithm in the Linux kernel so that the UART divisor
calculation is more accurate. It also fixes problems on some picky UARTs
that have sampling anomalies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Having to decode hwerrcause/excause values is a pain, so automate it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we report RETI/IPEND correctly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The hang function already tells you to reboot, so no point in showing it
twice.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
also, the r2 is used as global data pointer.
Signed-off-by: Dave Liu <daveliu@freescale.com>
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The current calculation will fail to cover all memory if
its size is not a power of two.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The commit 67256678f00c09b0a7f19e862e5c1847553d31bc add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
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I believe these code was copied from 74xx family, but for
86xx, it is unused.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
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