summaryrefslogtreecommitdiff
path: root/cpu
Commit message (Collapse)AuthorAgeLines
* ppc4xx: Make pll_write globalMatthias Fuchs2009-07-08-0/+1
| | | | | | | | | | | | | | This patch makes pll_write on PPC405EP boards global and callable from C code. pll_write can be used to dynamically modify the PLB:PCI divider as it is required for 33/66 MHz pci adapters based on the 405EP. board_early_init_f() is a good place to do that (check M66EN signal and call pll_write() when it is required). Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove compilation warning "pci_async_enabled defined but not used"Stefan Roese2009-07-08-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Implement is_pci_host() for 405 CPUsMatthias Fuchs2009-07-08-3/+16
| | | | | | | | | | | | | | | | | | | This patch implements the is_pci_host() function in a similiar way as it is used on 440 targets. The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not build on 405EP targets because checking the PCI arbiter is different. So putting the fixed code into a separate function makes the code more readable. Also using is_pci_host() on 405 brings 405 and 440 PCI code a little bit closer. In preparation for an upcoming 405EP based PMC module I made this function weak so that it can be overwritten from board specific code. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fixed PPC4xx debug compilation error in uic.cAlessio Centazzo2009-07-08-1/+1
| | | | | | | | | | This patch fixes a debug compilation error for PPC4xx platforms, all other architectures are not affected by this change. The 'handler' pointer was undefined. The fix is exercised and has effect only if DEBUG is defined. Signed-off-by: Alessio Centazzo acpatin@yahoo.com Signed-off-by: Stefan Roese <sr@denx.de>
* 4xx: Fix compilation warnings and MQ registers dump in SPD DDR2 codeFelix Radensky2009-07-08-17/+25
| | | | | | | | | | This patch fixes printf format string compilation warnings in several debug statements. It also fixes the dump of DDR controller MQ registers found on some 44x and 46x platforms. The current register dump code uses incorrect DCRs to access these registers. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup; update CHANGELOGWolfgang Denk2009-07-07-5/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-07-277/+1818
|\ | | | | | | | | | | | | Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * arm: Kirkwood: arch specific updated for ehci-Kirkwood driver supportPrafulla Wadaskar2009-07-06-5/+1
| | | | | | | | | | | | This patch abstracts Kirkwood arch specific changes to support ehci-kirkwood driver Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * arm nomadik: use 1000 as HZ value and rewrite timer codeAlessandro Rubini2009-07-06-139/+27
| | | | | | | | | | | | | | | | | | | | | | | | This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites timer code, which is now both correct and much smaller. Unused functions like udelay_masked() have been removed as no driver uses them, even the ones that are not currently active for this board. mtu.h is copied literally from the kernel sources. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm nomadik: cleanup resetAlessandro Rubini2009-07-06-12/+1
| | | | | | | | | | | | | | | | There is only one public release of the Nomadik chip, so the ifdef in reset code as well as a define in the config file are not needed Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * at91: Add CAN init functionDaniel Gorsulowski2009-07-06-0/+30
| | | | | | | | | | | | | | | | | | To enable CAN init, CONFIG_CAN has to be defined in the board config file and at91_can_hw_init() has to be called in the board specific code. CAN is available on AT91SAM9263 and AT91CAP9 SoC. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * S3C24x0: extract interrupts from timerJean-Christophe PLAGNIOL-VILLARD2009-07-06-21/+56
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm920t/interrupts: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2009-07-06-6/+6
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * move L2 cache enable/disable function to cache.c in the omap3 SoC directoryKim, Heung Jun2009-07-06-68/+104
| | | | | | | | | | | | Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> CC: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: Kirkwood: Basic SOCs supportPrafulla Wadaskar2009-07-06-0/+670
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * s3c64xx: move the reset_cpu functionMinkyu Kang2009-06-26-16/+36
| | | | | | | | | | | | | | | | Because of the reset_cpu is soc specific, should be move to soc And read reset value from SYS_ID register instead of hard code this patch also supports s3c6410 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mx27: basic cpu supportIlya Yanok2009-06-21-0/+533
| | | | | | | | | | | | This patch adds generic code to support Freescale's i.MX27 SoCs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
| * i.MX31: Create a common device file.Magnus Lilja2009-06-21-0/+57
| | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * MX31: Add NAND SPL for i.MX31.Magnus Lilja2009-06-21-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the NAND SPL framework needed to boot i.MX31 boards from NAND. It has been tested on a i.MX31 PDK board with large page NAND. Small page NANDs should work as well, but this has not been tested. Note: The i.MX31 NFC uses a non-standard layout for large page NANDs, whether this is compatible with a particular setup depends on how the NAND device is programmed by the flash programmer (e.g. JTAG debugger). The patch is based on the work by Maxim Artamonov. Signed-off-by: Maxim Artamonov <scn1874@yandex.ru> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * ARM1136: Introduce CONFIG_PRELOADER macro.Magnus Lilja2009-06-21-12/+12
| | | | | | | | | | | | | | | | | | Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's in start.S. In preparation for adding support for NAND SPL the macro CONFIG_PRELOADER is introducted and replaces the CONFIG_ONENAND_IPL in start.S. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * at91: unify nor boot supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-2/+284
| | | | | | | | | | | | the lowlevel init sequence is the same so unify it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | 83xx: Add support for fsl_dma driverPeter Tyser2009-07-02-121/+4
| | | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC referencesPeter Tyser2009-07-02-1/+1
| | | | | | | | | | | | | | | | | | | | Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures use Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl_ddr: Fix DDR3 calculation of rank density with 8GB or moreTimur Tabi2009-07-01-1/+1
| | | | | | | | | | | | | | | | | | | | The calculate for rank density in compute_ranksize() for DDR3 used all integers for the expression, so the result was also a 32-bit integer, even though the 'bsize' variable is a u64. Fix the expression to calculate a true 64-bit value. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl_dma: Break out common memory initialization functionPeter Tyser2009-07-01-25/+1
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 8xxx: Move dma_init() call to common codePeter Tyser2009-07-01-3/+6
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl_dma: Move dma function prototypes to common header filePeter Tyser2009-07-01-4/+0
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 8xxx: Rename dma_xfer() to dmacpy()Peter Tyser2009-07-01-32/+30
| | | | | | | | | | | | | | | | Also update dmacpy()'s argument order to match memcpy's and use phys_addr_t/phy_size_t for address/size arguments Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 8xxx: Break out DMA code to a common filePeter Tyser2009-07-01-102/+0
| | | | | | | | | | | | | | | | DMA support is now enabled via the CONFIG_FSL_DMA define instead of the previous CONFIG_DDR_ECC Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Add CPU_TYPE_ENTRY supportKumar Gala2009-06-30-12/+21
|/ | | | | | | | Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use this to convey the # of cores and DDR width in the near future so its good to keep in sync. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Blackfin: bump up default JTAG console timeoutVivi Li2009-06-15-1/+1
| | | | | | | | | | The debug tools that interface with the other side of the JTAG console got much slower when generalizing things, so bump up the default timeout value on the U-Boot side to cope. Hopefully at some point we can improve the debug tools to speed things back up. Signed-off-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Switched davinci_emac Ethernet driver to use newer APIBen Warren2009-06-15-0/+12
| | | | | | | | Added CONFIG_NET_MULTI to all Davinci boards Removed all calls to Davinci network driver from board code Added cpu_eth_init() to cpu/arm926ejs/cpu.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Moved Davinci Ethernet driver to drivers/netBen Warren2009-06-15-656/+1
| | | | | | This driver has been renamed davinci_emac.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* fsl/85xx, 86xx: Sync up DMA codePeter Tyser2009-06-12-10/+12
| | | | | | | | | | | | | | | | | | | | | The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser2009-06-12-26/+32
| | | | | | | | Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to reduce a large amount of code duplication Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* qe: Pass in uec_info struct through uec_initializeHaiying Wang2009-06-12-34/+7
| | | | | | | | | | | The uec driver contains code to hard code configuration information for the uec ethernet controllers. This patch creates an array of uec_info structures, which are then parsed by the corresponding driver instance to determine configuration. It also creates function uec_standard_init() to initialize all UEC interfaces for 83xx and 85xx. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add QE clk supportHaiying Wang2009-06-12-1/+18
| | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <Timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added MPC8535/E identifiersKumar Gala2009-06-12-0/+2
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Always attempt ethernet device tree fixupKumar Gala2009-06-12-3/+0
| | | | | | | | | | | Its reasonable that we may have ethernet devices but dont have drivers or support enabled for them in u-boot and want the device tree fixed up. Unconditionally calling the ethernet fixup is fine since if we dont have ethernet nodes that match (or aliases) we will not attempt to do anything. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
* mpc512x: Fix problem with I2C access before relocationStefan Roese2009-06-12-1/+1
| | | | | | | | | This is needed for the upcoming esd MECP5123 board port which uses I2C EEPROM for environment storage. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Acked-by: Heiko Schocher<hs@denx.de>
* mpc83xx: USB: Reorganized its supportVivek Mahajan2009-06-12-1/+18
| | | | | | | | | | | | | | | | | The following patch reorganizes/reworks the USB support for mpc83xx as under:- * Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to cpu/mpx83xx/cpu_init.c * Board specific usb_phy_type is read from the environment * Adds USB EHCI specific structure in include/usb/ehci-fsl.h * Copyrights revamped in most of the following files Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser2009-06-12-34/+34
| | | | | | | | Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xxPeter Tyser2009-06-12-1/+1
| | | | | | | | Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc512x: Use serial_setbrg() in serial_init() to not duplicate the codeStefan Roese2009-06-12-21/+15
| | | | | | | | This patch removes the duplicated code for baudrate generator configuration in the PSC serial_init() implementation by calling serial_setbrg() instead of duplicating the code. Signed-off-by: Stefan Roese <sr@denx.de>
* mpc512x: Fix PSC divisor calculation for baudrate settingStefan Roese2009-06-12-1/+1
| | | | | | | The wrong input frequency was used in serial_setbrg(). This patch fixes this by using ips_clk as input frequency for the PSC baudrate generator. Signed-off-by: Stefan Roese <sr@denx.de>
* MPC512x: remove include/mpc512x.hWolfgang Denk2009-06-12-6/+19
| | | | | | | | | | | | | | | | | | | | Move needed definitions (register descriptions etc.) from include/mpc512x.h into include/asm-ppc/immap_512x.h. Instead of using a #define'd register offset, use a function that provides the PATA controller's base address. All the rest of include/mpc512x.h are register offset definitions which can be eliminated by proper use of C structures. There are only a few register offsets remaining that are needed in cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h which is intended as a temporary workaround only. In a later patch this file will be removed, too, and then auto-generated from the respective C structs. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* MPC512x: use I/O accessors instead of pointer accessesWolfgang Denk2009-06-12-130/+168
| | | | | | | | This commit changes the MPC512x code to use I/O accessor calls (i.e. out_*() and in_*()) instead of using deprecated pointer accesses. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* MPC512x: add more hardware description to immap_512x.hWolfgang Denk2009-06-12-3/+3
| | | | | | | | | | | | | - add GPIO module description - add Address Latch Timing Register description - add IO Control Memory Map - add FEC Memory Map Also change board/freescale/mpc5121ads/mpc5121ads.c and cpu/mpc512x/iopin.c as needed. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* cpu/mpc512x/diu.c: fix warning: assignment from incompatible pointer typeWolfgang Denk2009-06-12-1/+1
| | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* cpu/mpc512x/pci.c: minor coding style cleanupWolfgang Denk2009-06-12-6/+3
| | | | | | | Get rid of variable declaration in the middle of the code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
generated by cgit v1.1 at 2024-11-17 13:05:54 +0000