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| * at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000Jean-Christophe PLAGNIOL-VILLARD2009-04-16-38/+44
| | | | | | | | | | | | | | | | The timer has been rewrote with a precision at ~0,18% Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: Sergey Lapin <slapin@ossfans.org> Tested-by: Eric BENARD <ebenard@free.fr>
| * at91: add support for the PM9263 board of Ronetix GmbHIlko Iliev2009-04-16-4/+14
| | | | | | | | | | | | | | | | | | | | The PM9263 board is based on the AT91SAM9263-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9263.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: improve clock frameworkJean-Christophe PLAGNIOL-VILLARD2009-04-16-0/+218
| | | | | | | | | | | | calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | ppc4xx: Add "booting from NAND" to 4xx NAND-booting targetsStefan Roese2009-04-16-1/+5
|/ | | | | | | | This additional text in the bootup log helps to see if the board is configured for NAND-booting. Especially helpful for boards that can boot from NOR and NAND (e.g. most of the AMCC eval boards). Signed-off-by: Stefan Roese <sr@denx.de>
* Blackfin: audit UART for all known anomaliesMike Frysinger2009-04-06-2/+21
| | | | | | | There is no code change here, just new comments, but this keeps me from having to do another audit from scratch in the future. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add check for anomaly 05000362Mike Frysinger2009-04-06-0/+9
| | | | | | | | | | | | | | | DESCRIPTION: The column address width settings for banks 2 and 3 are misconnected in the SDRAM controller. Accesses to bank 2 will result in an error if the Column Address Width for bank 3 (EB3CAW ) is not set to be the same as that of bank 2. WORKAROUND: If using bank 2, make sure that banks 2 and 3 have the same column address width settings in the EBIU_SDBCTL register. This must be the case regardless of whether or not bank 3 is enabled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add comment about anomaly 05000430 avoidanceMike Frysinger2009-04-06-0/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add workaround for anomaly 05000242Mike Frysinger2009-04-06-1/+1
| | | | | | | | | | | | | DESCRIPTION: If the DF bit is set prior to a hardware reset, the PLL will continue to divide CLKIN by 2 after the hardware reset, but the DF bit itself will be cleared in the PLL_CTL register. WORKAROUND: Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by 2 after reset. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add workaround for anomaly 05000171Mike Frysinger2009-04-06-0/+4
| | | | | | | | | | | | | DESCRIPTION: The Boot ROM is executed at power up/reset and changes the value of the SICA_IWR registers from their default reset value of 0xFFFF, but does not restore them. WORKAROUND: User code should not rely on the default value of these registers. Set the desired values explicitly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-04-05-1142/+108
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| * arm: unify reset commandJean-Christophe PLAGNIOL-VILLARD2009-04-05-131/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: clean cache managementJean-Christophe PLAGNIOL-VILLARD2009-04-05-620/+103
| | | | | | | | | | | | unify arm cache management except for non standard cache as ARM7TDMI Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: update co-processor 15 accessJean-Christophe PLAGNIOL-VILLARD2009-04-05-533/+154
| | | | | | | | | | | | import system.h from linux Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP: Fix compile issueSanjeev Premi2009-04-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this compile error: board.c: In function 'do_switch_ecc': board.c:339: error: 'cmd_tbl_t' has no member named 'help' make[1]: *** [board.o] Error 1 make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3' make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2 This is due to the fact that current command uses long help for the usage print even if the CONFIG_SYS_LONGHELP is not enabled. (Thanks Jean-Christophe for explanation). Signed-off-by: Sanjeev Premi <premi@ti.com>
| * Move machine specific code to board at s3c64xx (v2)Kyungmin Park2009-04-05-7/+0
| | | | | | | | | | | | | | | | | | | | Move machine specific code to smdk6400. Some board use OneNAND instead of NAND. Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w. So it's better to use macro instead of hard-coded value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | mpc5200: reduce delays in i2cJon Smirl2009-04-05-3/+3
| | | | | | | | | | | | | | | | The previous code waited 1000us before checking i2c status. Measurement shows i2c is usually ready in under 50us. Change the polling interval to 15us, loop 6,667 times to keep the polling timeout constant at 100ms.
* | Update CHANGELOG, coding style cleanup.Wolfgang Denk2009-04-05-2/+0
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* | mpc8260: Fill in brg's clock-frequency in device tree.Scott Wood2009-04-04-0/+3
|/ | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* at91: move dataflash spi driver to drivers/spiJean-Christophe PLAGNIOL-VILLARD2009-04-04-158/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-04-04-81/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91rm9200: Reset updateJean-Christophe PLAGNIOL-VILLARD2009-04-04-10/+4
| | | | | | | Update the rm9200 reset sequence to try executing a board-specific reset function and move specific board reset to board. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91rm9200: move serial shutdown code to serial driversJean-Christophe PLAGNIOL-VILLARD2009-04-04-10/+3
| | | | | | | introduce serial_exit for this purpose. Use it only when the rm9200 serial driver is active Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91rm9200: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-04-04-114/+1
| | | | | | add CONFIG_AT91RM9200_USART to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Add support for the AT91RM9200EK Board.Ulf Samuelsson2009-04-04-3/+1
| | | | | | | | | | | | | | | | | | | The AT91RM9200-EK Evaluation Board supports the AT91RM9200 ARM9-based 32-bit RISC microcontroller and enables real-time code development and evaluation. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507 with - NOR (cfi driver) - DataFlash - USB OHCI - Net - I2C (hard) Signed-off-by: Ulf Samuelsson <ulf@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: rename DATAFLASH_MMC_SELECT to CONFIG_DATAFLASH_MMC_SELECTJean-Christophe PLAGNIOL-VILLARD2009-04-04-0/+5
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: spi init add hardware chip select supportJean-Christophe PLAGNIOL-VILLARD2009-04-04-27/+136
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* PQ2FADS: Enable PCI.Scott Wood2009-04-04-0/+2
| | | | | | PCI on PQ2FADS is very similar to PCI on MPC8272ADS. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Blackfin: do not delay on output bytesMike Frysinger2009-04-02-4/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix crash when booting from external memoryMike Frysinger2009-04-02-0/+11
| | | | | | | | | When testing a u-boot binary that hasn't been booted from the bootrom, we have to make sure the bootstruct structure has sane storage space. If we don't, the initcode will crash when it tries to dereference an invalid pointer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-04-02-3668/+251
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| * OMAP: use {read,write}l to access timer registersLadislav Michl2009-03-30-12/+9
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
| * OMAP: rename timer divisorLadislav Michl2009-03-30-4/+4
| | | | | | | | | | | | | | Divisor field is called PTV not PVT. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP: reindent timer codeLadislav Michl2009-03-30-11/+8
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
| * s3c2410: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-180/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-448/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-306/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-335/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-476/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-228/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm720t/clps7111: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-126/+1
| | | | | | | | | | | | add CONFIG_CLPS7111_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * lpc2292: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | | | | | | | | | add CONFIG_LPC2292_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ks8695: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-118/+1
| | | | | | | | | | | | add CONFIG_KS8695_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c64xx: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-03-29-46/+0
| | | | | | | | | | | | add CONFIG_USB_S3C64XX to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx31: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-233/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * netarm: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-201/+1
| | | | | | | | | | | | add CONFIG_NETARM_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * sa1100: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-161/+1
| | | | | | | | | | | | add CONFIG_SA1100_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: extract cache from cpu.cJean-Christophe PLAGNIOL-VILLARD2009-03-29-63/+92
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-219/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move rtc driver to drivers/rtcJean-Christophe PLAGNIOL-VILLARD2009-03-29-77/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-29-291/+0
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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