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* ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patchStefan Roese2008-08-21-24/+13
| | | | | | | | | | | | | This patch fixes some minor issues introduced with the patch: ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika: - Rework memory-queue and PLB arbiter optimization code, that the local variable is not needed anymore. This removes one #ifdef. - Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead of XXX+ 0x01). This was not introduced by Prodyut, just a copy-paste problem. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe,Prodyut Hazarika2008-08-21-5/+38
| | | | | | | | | | | | | | | PPC405EX and PPC460EX/GT/SX - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX processors - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared across processors (405 and 440/460) - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX processors - Add register bit definitions for Memory Queue Configuration registers Signed-off-by: Prodyut Hazarika <phazarika@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* fdt: rework fdt_fixup_ethernet() to use env instead of bd_tKumar Gala2008-08-21-8/+8
| | | | | | | | | | Move to using the environment variables 'ethaddr', 'eth1addr', etc.. instead of bd->bi_enetaddr, bi_enet1addr, etc. This makes the code a bit more flexible to the number of ethernet interfaces. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 BoardsAxel Beierlein2008-08-21-0/+20
| | | | | | Tested with TQM5200S on STK52XX.200 Board Signed-off-by: Axel Beierlein <belatronix@web.de>
* Merge branch 'next' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-08-20-1/+4
|\ | | | | | | | | | | Conflicts: MAINTAINERS
| * Merge branch 'favr-32' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-08-06-21/+29
| |\ | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS MAKEALL Makefile
| * | Add support for the hammerhead (AVR32) boardJulien May2008-07-30-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. For more information see: http:///www.miromico.com/hammerhead Signed-off-by: Julien May <mailinglist@miromico.ch> [haavard.skinnemoen@atmel.com: various small fixes and adaptions] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | Clean up usage of icache_disable/dcache_disableKumar Gala2008-08-19-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point in disabling the icache on 7xx/74xx/86xx parts and not also flushing the icache. All callers of invalidate_l1_instruction_cache() call icache_disable() right after. Make it so icache_disable() calls invalidate_l1_instruction_cache() for us. Also, dcache_disable() already calls dcache_flush() so there is no point in the explicit calls of dcache_flush(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ColdFire: Multiple fixes for M5282EVBTsiChung Liew2008-08-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Incorrect CFG_HZ value, change 1000000 to 1000. Rename #waring to #warning. RAMBAR1 uses twice in start.S, rename the later to FLASHBAR. Insert nop for DRAM setup. And, env_offset in linker file. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | | ColdFire: Implement SBF feature for M5445EVBTsiChung Liew2008-08-14-23/+302
| | | | | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | | ColdFire: Add SSPI feature for MCF5445xTsiChung Liew2008-08-14-6/+172
| | | | | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2008-08-14-32/+32
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| * | | s3c24x0: Update NAND driver to new API.Scott Wood2008-08-13-32/+32
| | | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | | Merge branch 'Makefile' of git://git.denx.de/u-boot-armWolfgang Denk2008-08-13-3/+3
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| * | | | drivers/mtd/nand: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-3/+3
| |/ / / | | | | | | | | | | | | | | | | | | | | rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-08-13-194/+242
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| * | | Merge branch 'master' of git://www.denx.de/git/u-boot-at91Wolfgang Denk2008-08-12-1/+1
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| | * | | at91: move arch-at91sam9 to arch-at91Jean-Christophe PLAGNIOL-VILLARD2008-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | | NAND boot: MPC8313ERDB supportScott Wood2008-08-12-107/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that with older board revisions, NAND boot may only work after a power-on reset, and not after a warm reset. I don't have a newer board to test on; if you have a board with a 33MHz crystal, please let me know if it works after a warm reset. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | NAND: Davinci driver updatesSergey Kubushyn2008-08-12-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I don't have hardware handy so I can not test it at the moment but changes are rather trivial so it should work. It would be nice if somebody with a hardware checked it anyways. Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
| * | | | NAND: Update 4xx NDFC driver to match updated nand subsystemStefan Roese2008-08-12-42/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the 4xx NAND driver ndfc.c to match the new infrastructure from the updated NAND subsystem. This NAND subsystem was recently synced again with the Linux 2.6.22 MTD/NAND subsystem. Tested successfully on AMCC Sequoia and Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Fixing coding style issuesWilliam Juul2008-08-12-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fixing leading white spaces - Fixing indentation where 4 spaces are used instead of tab - Removing C++ comments (//), wherever I introduced them Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | Remove white space at end.William Juul2008-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | Update MTD to that of Linux 2.6.22.1William Juul2008-08-12-54/+44
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot changed in the Linux MTD code, since it was last ported from Linux to U-Boot. This patch takes U-Boot NAND support to the level of Linux 2.6.22.1 and will enable support for very large NAND devices (4KB pages) and ease the compatibility between U-Boot and Linux filesystems. This patch is tested on two custom boards with PPC and ARM processors running YAFFS in U-Boot and Linux using gcc-4.1.2 cross compilers. MAKEALL ppc/arm has some issues: * DOC/OneNand/nand_spl is not building (I have not tried porting these parts, and since I do not have any HW and I am not familiar with this code/HW I think its best left to someone else.) Except for the issues mentioned above, I have ported all drivers necessary to run MAKEALL ppc/arm without errors and warnings. Many drivers were trivial to port, but some were not so trivial. The following drivers must be examined carefully and maybe rewritten to some degree: cpu/ppc4xx/ndfc.c cpu/arm926ejs/davinci/nand.c board/delta/nand.c board/zylonite/nand.c Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Stig Olsen <stig.olsen@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | | Merge branch 'master' of /home/stefan/git/u-boot/u-boot into nextStefan Roese2008-08-12-141/+141
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| * | | MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk'Wolfgang Denk2008-08-12-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-08-12-2/+2
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| | * \ \ Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2008-08-12-2/+2
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| | | * | | i.MX31: Fix mx31_gpio_mux() function and MUX_-macros.Magnus Lilja2008-08-11-2/+2
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX contacts instead of only the first 256 ones as is the case prior to this patch. Add missing MUX_* macros and update board files to use the new macros. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | | | ads5121: fix compiler warnings (unused variables)Wolfgang Denk2008-08-12-3/+1
| |/ / / | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUSKumar Gala2008-08-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_NUM_CPUS to match existing define used by 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
| * | | POWERPC 86xx: Move BAT setup code to CBecky Bruce2008-08-11-119/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed because we will be possibly be locating devices at physical addresses above 32bits, and the asm preprocessing does not appear to deal with ULL constants properly. We now call write_bat in lib_ppc/bat_rw.c. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
| * | | mpc5121: Move iopin features from board specific to common files.Kenneth Johansson2008-08-05-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | And in the process eliminate some duplicate register defines. Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
| * | | mpc5121: squash some fdt fixup errorsJohn Rigby2008-08-05-15/+62
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ADS5121 when booting linux the following errors are seen: Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND This is caused by ft_cpu_setup trying to deal with both old and new soc node naming. This patch fixes this by being smarter about what to fixup. Also do soc node fixups by compatible instead of by path. A new board config called OF_SOC_COMPAT defined to be "fsl,mpc5121-immr" replaces the old OF_SOC node path that was defined to be "soc@80000000". Old device trees still work, but the compatiblity is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES which is on by default in include/configs/ads5121.h. Signed-off-by: John Rigby <jrigby@freescale.com>
| * | nios2/sysid: fix printf warningJean-Christophe PLAGNIOL-VILLARD2008-08-03-1/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | nios2: fix phys_addr_t and phys_size_t supportJean-Christophe PLAGNIOL-VILLARD2008-08-03-0/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCIMatvejchikov Ilya2008-07-31-20/+27
| |/ | | | | | | Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2008-07-30-1/+1
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| | * mips: Fix baudrate divisor computation on alchemy cpusWolfgang Ocker2008-07-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor on alchemy cpus. Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| * | Removed support for the adsvix board.Adrian Filipi2008-07-30-5/+0
| |/ | | | | | | | | | | | | | | Support for the adsvix was originally provided by Applied Data Systems (ADS), inc., now EuroTech, Inc. The board never shipped aside from some sample boards. Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
| * microblaze: Fix printf() format issuesMichal Simek2008-07-20-1/+1
| | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * ppc4xx: Fix incorrect MODTx setup for some DIMM configurationsStefan Roese2008-07-18-12/+12
| | | | | | | | | | | | | | | | | | | | This patch fixes a problem with incorrect MODTx (On Die Termination) setup for a configuration with multiple DIMM's and multiple ranks. Without this change Katmai was unable to boot Linux with DDR2 frequency >= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux with DDR2 frequency = 640MHz and mem=4GB. Signed-off-by: Stefan Roese <sr@denx.de>
* | Fix merge problemsStefan Roese2008-08-06-40/+43
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 supportStefan Roese2008-07-18-36/+7
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: CPU PPC440x5 on Virtex5 FXRicardo Ribalda Delgado2008-07-18-153/+361
| | | | | | | | | | | | | | | | | | | | | | -This patchs gives support for the embbedded ppc440 on the Virtex5 FPGAs -interrupts.c divided in uic.c and interrupts.c -xilinx_irq.c for xilinx interrupt controller -Include modifications propossed by Stefan Roese Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Acked-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of /home/stefan/git/u-boot/u-boot into nextStefan Roese2008-07-17-35/+74
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| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-07-15-25/+62
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| | * 85xx: Cleanup L2 cache size detectionKumar Gala2008-07-14-17/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 size detection code was a bit confusing and we kept having to add code to it to handle new processors. Change the sense of detection so we look for the older processors that aren't changing. Also added support for 1M cache size on 8572. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreqPaul Gortmaker2008-07-14-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards that have external 16550 UARTs don't have a direct tie between bi_busfreq and the clock used for the UARTs. Boards that do have such a tie should set CFG_NS16550_CLK to be get_bus_freq(0) -- which most of them do already. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| | * Change the temp map to ROM to align addresses to page size.Andrew Klossner2008-07-14-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With a page size of BOOKE_PAGESZ_16M, both the real and effective addresses must be multiples of 16MB. The hardware silently truncates them so the code happens to work. This patch clarifies the situation by establishing addresses that the hardware doesn't need to truncate. Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-24 14:28:38 +0000