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* [PATCH] PPC4xx start.S: Fix for processor errataStefan Roese2006-11-22-11/+12
| | | | | | | | Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx errata 1.12: 440_33 by moving patch up in code. Signed-off-by: Jeff Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.cStefan Roese2006-10-24-4/+9
| | | | Patch by Stefan Roese, 24 Oct 2006
* Cleanup compile warnings. Prepare for release 1.1.5Wolfgang Denk2006-10-20-3/+3
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* Add board/cpu specific NAND chip select function to 440 NDFCStefan Roese2006-10-20-13/+26
| | | | | Based on idea and implementation from Jeff Mann Patch by Stefan Roese, 20 Oct 2006
* Make 4xx bootup message shorter on 440EPx/GRx platformsStefan Roese2006-10-18-4/+12
| | | | Patch by Stefan Roese, 18 Oct 2006
* * PPC405EP: Add support for board configuration of CPC0_PCI registerStefan Roese2006-10-12-1/+5
| | | | | This is needed to be able to configure PerWE*/PCI_INT* pin as PerWE* Patch by Tolunay Orkun, 07 Apr 2006
* * PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.Stefan Roese2006-10-12-4/+10
| | | | | | - Add configuration of Open Drain GPIO Output selection - Add configuration of initial value of GPIO output pins Patch by Tolunay Orkun, 07 Apr 2006
* Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-1/+1
| | | | Based on patch by Mike Frysinger, 20 Jun 2006
* Coding style cleanupWolfgang Denk2006-10-09-15/+15
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* Add support for AMCC Rainier PPX440GRx eval boardStefan Roese2006-09-13-2/+2
| | | | Patch by Stefan Roese, 13 Sep 2006
* Fix build problem cpu/ppc4xx/ndfc.cStefan Roese2006-09-07-1/+3
| | | | Patch by Stefan Roese, 07 Sep 2006
* Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-266/+787
| | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* Merge with /home/m8/git/u-bootWolfgang Denk2006-09-04-8/+10
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| * Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* | PCIe endpoint support for AMCC Yucca 440SPe boardStefan Roese2006-08-29-24/+403
| | | | | | | | Patch by Tirumala R Marri, 26 Aug 2006
* | Code cleanupWolfgang Denk2006-08-27-1/+1
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* Merge with /home/raj/git/u-bootWolfgang Denk2006-08-11-14/+13
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| * Fix PCI-Express on PPC440SPe rev. A.Rafal Jaworowski2006-08-11-14/+13
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* | Merge with /home/raj/git/u-bootWolfgang Denk2006-08-10-3/+787
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| * Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-3/+787
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* | PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceStefan Roese2006-07-28-3/+3
| | | | | | | | | | | | | | AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
* | Code cleanupWolfgang Denk2006-07-21-1/+1
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* | Add support for TB5200 boardWolfgang Denk2006-07-19-2/+2
|/ | | | | | | | The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module integrated in a little aluminium case. Patch by Martin Krause, 8 Jun 2006 Some code cleanup
* Fix timer problems on AMCC yucca board.Marian Balakowicz2006-07-06-5/+3
| | | | Set Timer Clock Select to use CPU clock as a timer input source.
* Add system memory to the PCI region list for AMCC PPC44x CPUs.Marian Balakowicz2006-07-04-0/+13
| | | | Enabled it for Yucca board.
* Cleanup config file and bootup output for Yucca board.Marian Balakowicz2006-07-03-2/+4
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* Fix CONFIG_440_GX define usage.Marian Balakowicz2006-06-30-1/+1
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* Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-70/+623
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| * Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-70/+623
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* | Minor cleanup for PCS440EP boardStefan Roese2006-06-13-1/+1
| | | | | | | | Patch by Stefan Roese, 13 Jun 2006
* | Add support for PCS440EP boardStefan Roese2006-06-02-2/+127
| | | | | | | | Patch by Stefan Roese, 02 Jun 2006
* | Fix problem in PVR detection for 440GRStefan Roese2006-05-18-1/+1
| | | | | | | | Patch by Stefan Roese, 18 May 2006
* | Add support for AMCC 440EP Rev C and 440GR Rev BStefan Roese2006-05-10-1/+9
| | | | | | | | Patch by John Otken, 08 May 2006
* | Some code cleanupWolfgang Denk2006-04-16-107/+107
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* | Merge with /home/sr/git/u-boot/4xx-sdramWolfgang Denk2006-04-05-34/+342
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| * | Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)Stefan Roese2006-03-31-34/+342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 405 SDRAM: - The SDRAM parameters can now be defined in the board config file and the 405 SDRAM controller values will be calculated upon bootup (see PPChameleonEVB). When those settings are not defined in the board config file, the register setup will be as it is now, so this implementation should not break any current design using this code. Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the TR1 value for the DDR. - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006
* | | GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-25/+17
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* | Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.cStefan Roese2006-03-13-1/+1
| | | | | | | | Patch by Stefan Roese, 13 Mar 2006
* | cpu/ppc4xx/start.S : exceptions are enabled after relocationStefan Roese2006-03-13-23/+18
| | | | | | | | Patch by Cedric Vincent, 6 June 2005
* | PMC405 and CPCI405: Moved configuration of pci resources into config file.Stefan Roese2006-01-18-4/+5
|/ | | | | | PMC405 and CPCI2DP: Added firmware download and booting via pci. Patch by Matthias Fuchs, 20 Dec 2005
* (no commit message)Wolfgang Denk2005-12-12-1/+1
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* Code cleanup, especially MIPS for GCC 4.xWolfgang Denk2005-12-04-177/+177
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* Compile warning fixedStefan Roese2005-11-29-1/+1
| | | | Patch by Stefan Roese, 29 Nov 2005
* Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.Stefan Roese2005-11-29-103/+189
| | | | Patch by John Otken, 23 Nov 2005
* Changed PPC44x startup message (cpu info, speed...) to common style:Stefan Roese2005-11-27-102/+131
| | | | | | | | | | | On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional informations like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005
* Add support for Prodrive P3P440 board:Stefan Roese2005-11-22-3/+81
| | | | | | | - Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c - CFG_FLASH_QUIET_TEST added to use the common CFI driver for bank autodetection Patch by Stefan Roese, 22 Nov 2005
* Fix Bamboo DDR SDRAM initialization (problem with onboard SDRAM)Stefan Roese2005-11-15-50/+99
| | | | Patch by Stefan Roese, 15 Nov 2005
* Add support for Ocotea pass 3 with 440GX Rev. FStefan Roese2005-11-01-0/+3
| | | | Patch by Stefan Roese, 01 Nov 2005
* Merge with /home/m8/git/u-bootWolfgang Denk2005-10-29-29/+47
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| * Add support for multiple PHYs.Marian Balakowicz2005-10-28-30/+47
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