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* [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM supportStefan Roese2007-02-20-0/+2943
| | | | | | | | | | | | | | | | | This patch adds support for the DDR2 controller used on the 440SP and 440SPe. It is tested on the Katmai (440SPe) eval board and works fine with the following DIMM modules: - Corsair CM2X512-5400C4 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM) This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 filesStefan Roese2007-02-20-413/+478
| | | | | | | | | | Since the existing 4xx SPD SDRAM initialization routines for the 405 SDRAM controller and the 440 DDR controller don't have much in common this patch splits both drivers into different files. This is in preparation for the 440 DDR2 controller support (440SP/e). Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Add support for multiple I2C bussesStefan Roese2007-02-20-213/+245
| | | | | | | | | | | | | | This patch adds support for multiple I2C busses on the PPC4xx platforms. Define CONFIG_I2C_MULTI_BUS in the board config file to make use of this feature. It also merges the 405 and 440 i2c header files into one common file 4xx_i2c.h. Also the 4xx i2c reset procedure is reworked since I experienced some problems with the first access on the 440SPe Katmai board. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boardsStefan Roese2007-02-02-6/+10
| | | | | | | | Previously the strapping DCR/SDR was read to determine if the internal PCI arbiter is enabled or not. This strapping bit can be overridden, so now the current status is read from the correct DCR/SDR register. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440EPx/440GRx cpu detectionStefan Roese2007-01-31-4/+8
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/hs/SC3/u-boot-devWolfgang Denk2007-01-19-6/+3
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| * [PATCH] Fix: Compilerwarnings for SC3 board.Heiko Schocher2007-01-18-6/+3
| | | | | | | | | | | | | | The EBC Configuration Register is now by CFG_EBC_CFG definable Added JFFS2 support for the SC3 board. Signed-off-by: Heiko Schocher <hs@denx.de>
* | [PATCH] Add support for AMCC Taishan PPC440GX eval boardStefan Roese2007-01-18-76/+104
|/ | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/hs/SC3/u-bootWolfgang Denk2007-01-15-3/+12
|\ | | | | | | Some code cleanup.
| * Added support for the SOLIDCARD III board from EurodesignHeiko Schocher2007-01-11-2/+7
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | [PATCH] Fix 440SPe rev B detection from previous patchStefan Roese2007-01-15-1/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-4/+24
| | | | | | | | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] 44x: Fix problem with DDR controller setup (refresh rate)Stefan Roese2007-01-06-1/+1
| | | | | | | | | | | | | | This patch fixes a problem with an incorrect setup for the refresh timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese2007-01-05-3/+0
|/ | | | | | | | | | This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/hs/TQ/u-boot-devWolfgang Denk2006-12-24-1/+2
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| * Added support for the TQM8272 board from TQHeiko Schocher2006-12-21-1/+2
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | [PATCH] PPC4xx: 440SP Rev. C detection addedStefan Roese2006-11-28-0/+4
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/sr/git/u-boot/denx-alpr-merge-testWolfgang Denk2006-11-27-31/+31
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| * | [PATCH] 4xx: Fix problem with board specific reset code (now for real)Stefan Roese2006-11-27-1/+2
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] 4xx: Fix problem with board specific reset codeStefan Roese2006-11-27-0/+3
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] Remove testing 4xx enet PHY setupStefan Roese2006-11-27-16/+1
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | [PATCH] Update Prodrive ALPR board support (440GX)Stefan Roese2006-11-27-5/+8
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-27-11/+12
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| * \ \ Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-10-34/+70
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| * | | Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-12/+8
| | | | | | | | | | | | | | | | Patch by Stefan Roese, 07 Oct 2006
| * | | Merge with /home/stefan/git/u-boot/denxStefan Roese2006-09-18-299/+1188
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| * | | | Add initial support for the ALPR board from ProdriveStefan Roese2006-08-15-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | NAND needs some additional testing Patch by Heiko Schocher, 15 Aug 2006
* | | | | [PATCH] 4xx_enet.c: Correct the setting of zmiifer registerStefan Roese2006-11-27-4/+4
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Patch below corrects the setting of the zmiifer register, it was overwritting the register rather than ORing the settings. Signed-off-by: Neil Wilson <NWilson@airspan.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | [PATCH] PPC4xx start.S: Fix for processor errataStefan Roese2006-11-22-11/+12
| |_|/ |/| | | | | | | | | | | | | | | | | | | | Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx errata 1.12: 440_33 by moving patch up in code. Signed-off-by: Jeff Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.cStefan Roese2006-10-24-4/+9
| | | | | | | | | | | | Patch by Stefan Roese, 24 Oct 2006
* | | Cleanup compile warnings. Prepare for release 1.1.5Wolfgang Denk2006-10-20-3/+3
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* | | Add board/cpu specific NAND chip select function to 440 NDFCStefan Roese2006-10-20-13/+26
| | | | | | | | | | | | | | | Based on idea and implementation from Jeff Mann Patch by Stefan Roese, 20 Oct 2006
* | | Make 4xx bootup message shorter on 440EPx/GRx platformsStefan Roese2006-10-18-4/+12
| | | | | | | | | | | | Patch by Stefan Roese, 18 Oct 2006
* | | * PPC405EP: Add support for board configuration of CPC0_PCI registerStefan Roese2006-10-12-1/+5
| | | | | | | | | | | | | | | This is needed to be able to configure PerWE*/PCI_INT* pin as PerWE* Patch by Tolunay Orkun, 07 Apr 2006
* | | * PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.Stefan Roese2006-10-12-4/+10
| | | | | | | | | | | | | | | | | | - Add configuration of Open Drain GPIO Output selection - Add configuration of initial value of GPIO output pins Patch by Tolunay Orkun, 07 Apr 2006
* | | Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-1/+1
| | | | | | | | | | | | Based on patch by Mike Frysinger, 20 Jun 2006
* | | Coding style cleanupWolfgang Denk2006-10-09-15/+15
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* | Add support for AMCC Rainier PPX440GRx eval boardStefan Roese2006-09-13-2/+2
| | | | | | | | Patch by Stefan Roese, 13 Sep 2006
* | Fix build problem cpu/ppc4xx/ndfc.cStefan Roese2006-09-07-1/+3
| | | | | | | | Patch by Stefan Roese, 07 Sep 2006
* | Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-266/+787
| | | | | | | | | | | | | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* | Merge with /home/m8/git/u-bootWolfgang Denk2006-09-04-8/+10
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| * | Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-8/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* | PCIe endpoint support for AMCC Yucca 440SPe boardStefan Roese2006-08-29-24/+403
| | | | | | | | Patch by Tirumala R Marri, 26 Aug 2006
* | Code cleanupWolfgang Denk2006-08-27-1/+1
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* Merge with /home/raj/git/u-bootWolfgang Denk2006-08-11-14/+13
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| * Fix PCI-Express on PPC440SPe rev. A.Rafal Jaworowski2006-08-11-14/+13
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* | Merge with /home/raj/git/u-bootWolfgang Denk2006-08-10-3/+787
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| * Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-3/+787
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* | PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceStefan Roese2006-07-28-3/+3
| | | | | | | | | | | | | | AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
* | Code cleanupWolfgang Denk2006-07-21-1/+1
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