summaryrefslogtreecommitdiff
path: root/cpu/ppc4xx/speed.c
Commit message (Collapse)AuthorAgeLines
* ppc4xx: Fix typos in 460GT/EX FBDV arrayDave Mitchell2008-05-08-1/+1
| | | | | | | Corrected two typos in the 460GT/EX FBDV array. Signed-off-by: Dave Mitchell <dmitchell@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix sys_get_info() for 405GP(r)Matthias Fuchs2008-04-21-0/+2
| | | | | | | | This patch assigns the correct EBC clock for 405GP(r) CPUs to PPC4xx_SYS_INFO structure. Without this patch U-Boot uses an uninitialized EBC clock in its startup message. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)Stefan Roese2008-03-15-2/+123
| | | | | | This patch adds basic support for the AMCC 460EX/460GT PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add freqUART to CPU speed detectionStefan Roese2007-10-31-8/+17
| | | | | | | This value is needed later for the device tree configuration of the uart clock. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-15/+15
| | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add PPC405EX supportStefan Roese2007-10-31-6/+174
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix problem in PLL clock calculationStefan Roese2007-08-13-16/+17
| | | | | | | This patch was originall provided by David Mitchell <dmitchell@amcc.com> and fixes a bug in the PLL clock calculation. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add AMCC PPC405EZ supportStefan Roese2007-03-21-2/+112
| | | | | | | | | | This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add support for the AMCC Katmai (440SPe) eval boardStefan Roese2007-02-20-7/+6
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-1/+2
| | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-2/+252
|\
| * Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-2/+252
| |
* | GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-5/+1
|/
* Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.Stefan Roese2005-11-29-1/+1
| | | | Patch by John Otken, 23 Nov 2005
* Add support for AP1000 board.Wolfgang Denk2005-10-09-0/+7
| | | | Patch by James MacAulay, 07 Oct 2005
* Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)Stefan Roese2005-08-08-2/+2
| | | | Patch by Stefan Roese, 08 Aug 2005
* Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.Stefan Roese2005-08-01-3/+92
| | | | Patch by Steven Blakeslee, 27 Jul 2005
* CPU speed calculation updated (fixed a rounding problem)stroese2004-12-16-34/+14
|
* Patch by Andrea Marson, 11 Jun 2004:wdenk2004-07-01-2/+7
| | | | | | | Update for PPChameleon board: - support for SysClk @ 25MHz - support for Silicon Motion SM712 VGA controller - some clean ups
* Code cleanup; make several boards compile & link.wdenk2004-03-14-1/+1
|
* * Patch by Travis Sawyer, 01 Mar 2004:wdenk2004-03-14-2/+3
| | | | | | | | | | | | | | | | | | | Ocotea: - Add IBM PPC440GX Ref Platform support (Ocotea) Original code by Paul Reynolds <PaulReynolds@lhsolutions.com> Adapted to U-Boot and 440GX port 440gx_enet.c: - Add gracious handling of all Ethernet Pin Selections for 440GX - Add RGMII selection for Cicada CIS8201 Gigabit PHY ppc440.h: - Add needed bit definitions - Fix formatting * Patch by Carl Riechers, 1 Mar 2004: Add PPC440GX prbdv0 divider to fix memory clock calculation. * Patch by Stephan Linz, 27 Feb 2004 - avoid problems for targets without NFS download support
* * Patch by Peter Ryser, 20 Feb 2004:wdenk2004-02-23-0/+4
| | | | | | | | | | | | | Add support for the Xilinx ML300 platform * Patch by Stephan Linz, 17 Feb 2004: Fix watchdog support for NIOS * Patch by Josh Fryman, 16 Feb 2004: Fix byte-swapping for cfi_flash.c for different bus widths * Patch by Jon Diekema, 14 Jeb 2004: Remove duplicate "FPGA Support" notes from the README file
* Patch by Travis Sawyer, 30 Dec 2003:wdenk2004-02-06-0/+53
| | | | | | | Add support for IBM PPC440GX. Multiple EMAC Ethernet devices, select MDI port based on enabled EMAC device. Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX base PrPMC board.
* * Code cleanup:wdenk2003-06-27-1/+1
| | | | | | | | | - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
* PPC405EP support added.stroese2003-05-23-2/+123
|
* Changed PPC405GPr version from A to B.stroese2003-04-04-1/+1
|
* Initial revisionwdenk2002-11-03-0/+308