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* ppc4xx: Update flash size in reg property of the NOR flash nodeStefan Roese2009-10-23-1/+7
| | | | | | | | | | | | | | | Till now only the ranges in the ebc node are updated with the values currently configured in the PPC4xx EBC controller. With this patch now the NOR flash size is updated in the device tree blob as well. This is done by scanning the compatible nodes "cfi-flash" and "jedec-flash" for the correct chip select number. This size fixup is enabled for all AMCC eval board right now. Other 4xx boards may want to enable it as well, if this problem with multiple NOR FLASH sizes exists. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* cpu/ppc4xx/fdt.c: avoid strcpy() to constant stringWolfgang Denk2009-10-23-1/+1
| | | | | | | | | strcpy() was iused with the target address being a pointer to a constant string, which potentially is read-only. Use a (writable) array of characters instead. Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-2/+2
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Only fixup opb attached UARTsMatthias Fuchs2009-02-06-2/+22
| | | | | | | | | This patch updates the fdt UART clock fixup code to only touch CPU internal UARTs on 4xx systems. Only these UARTs are definitely clocked by gd->uart_clk. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correctly setup ranges property in ebc nodeStefan Roese2008-10-21-17/+28
| | | | | | | | Previously only the NOR flash mapping was written into the ranges property of the ebc node. This patch now writes all enabled chip select areas into the ranges property. Signed-off-by: Stefan Roese <sr@denx.de>
* fdt: rework fdt_fixup_ethernet() to use env instead of bd_tKumar Gala2008-08-21-1/+1
| | | | | | | | | | Move to using the environment variables 'ethaddr', 'eth1addr', etc.. instead of bd->bi_enetaddr, bi_enet1addr, etc. This makes the code a bit more flexible to the number of ethernet interfaces. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boardsStefan Roese2008-07-11-2/+10
| | | | | | | | | This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add weak default ft_board_setup() routineStefan Roese2008-05-08-3/+23
| | | | | | | | This patch adds a default ft_board_setup() routine to the 4xx fdt code. This routine is defined as weak and can be overwritten by a board specific one if needed. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fixup ebc clock in FDT for 405GP/EPMarkus Brunner2008-04-29-2/+8
| | | | | | | | On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc doesn't exist. Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
* ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdtStefan Roese2008-04-25-0/+42
| | | | | | | | | | The PCIe root-complex/endpoint setup as configured via the "pcie_mode" environment variable will now get passed to the Linux kernel by setting the device_type property of the PCIe device tree node. For normal root- complex configuration it will keep its defaults value of "pci" and for endpoint configuration it will get changed to "pci-endpoint". Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: fdt: Cleanup setup of cpu node setupStefan Roese2007-12-27-3/+4
| | | | | | | | | Now the cpu node setup ("timebase-frequency" and "clock-frequency") is without using the absolute path to the cpu node. This makes it possible to use this U-Boot version with both versions of cpu-node naming "cpu@0" and the former "PowerPC,440EPx@0". Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: fdt: use fdt_fixup_ethernet()Stefan Roese2007-12-27-71/+2
| | | | | | | | | By using aliases in the dts file, the ethernet node fixup is much easier with the recently added functions. Please note that the dts file needs the aliases for this to work. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Bring 4xx fdt support up-to-dateStefan Roese2007-12-27-80/+34
| | | | | | | | This patch update the 4xx fdt support. It enabled fdt booting on the AMCC Kilauea and Sequoia for now. More can follow later quite easily. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correct UART input clock calculation and passing to fdtStefan Roese2007-10-31-3/+5
| | | | | | | | We now use a value in the gd (global data) structure for the UART input frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely in get_sys_info(). Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correct UART input clock calculation and passing to fdtStefan Roese2007-10-31-4/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add freqUART to CPU speed detectionStefan Roese2007-10-31-0/+7
| | | | | | | This value is needed later for the device tree configuration of the uart clock. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add additional debug info to 4xx fdt supportStefan Roese2007-10-31-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add initial fdt support to 4xx (first needed on 405EX)Stefan Roese2007-10-31-0/+171
Signed-off-by: Stefan Roese <sr@denx.de>
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