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* ppc4xx: Fix reporting of bootstrap options G and F on 460EX/GTFelix Radensky2010-01-21-1/+1
| | | | | | | | Bootstrap options G and F are reported incorrectly (G instead of F and vice versa). This patch fixes this. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_pre_init() functionStefan Roese2009-11-19-1/+1
| | | | | | | | | This patch removes the duplicted implementations of the pci_pre_init() function by introducing a weak default function for it. This weak default has a different implementation for some PPC variants. It can be overridden by a board specific version. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Print PCI synchronous clock frequency upon bootupStefan Roese2009-10-23-1/+8
| | | | | | | | Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal synchronous PCI clock. Knowledge about the currently configured value might be helpful. So let's print it out upon bootup. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add PPC405EX(r) Rev D supportStefan Roese2009-10-07-10/+20
| | | | | | | | | | | | | | Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older 405EX(r) parts. Here a list: 0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec 0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec Since there are only a few older parts in the field, this patch now changes the PVR's above to represent the new Rev D versions. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Phong Vo" <pvo@amcc.com>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-19/+19
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chipsStefan Roese2009-07-30-0/+23
| | | | | | | This patch is based on a diff created by Phong Vo from AMCC. Signed-off-by: Phong Vo <pvo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Replace 4xx lowercase SPR referencesMatthias Fuchs2009-07-24-4/+4
| | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove compilation warning "pci_async_enabled defined but not used"Stefan Roese2009-07-08-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove PCI async bootup message if PCI is not usedStefan Roese2009-06-12-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add "booting from NAND" to 4xx NAND-booting targetsStefan Roese2009-04-16-1/+5
| | | | | | | | This additional text in the bootup log helps to see if the board is configured for NAND-booting. Especially helpful for boards that can boot from NOR and NAND (e.g. most of the AMCC eval boards). Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2008-12-16-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Moved initialization of PPC4xx EMAC to cpu_eth_init()Ben Warren2008-11-09-0/+14
| | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add routine to retrieve CPU numberAdam Graham2008-10-21-1/+18
| | | | | | | | | | | | Provide a weak defined routine to retrieve the CPU number for reference boards that have multiple CPU's. Default behavior is the existing single CPU print output. Reference boards with multiple CPU's need to provide a board specific routine. See board/amcc/arches/arches.c for an example. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc4xx: CPU PPC440x5 on Virtex5 FXRicardo Ribalda Delgado2008-07-18-0/+8
| | | | | | | | | | | -This patchs gives support for the embbedded ppc440 on the Virtex5 FPGAs -interrupts.c divided in uic.c and interrupts.c -xilinx_irq.c for xilinx interrupt controller -Include modifications propossed by Stefan Roese Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Acked-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add initial 460SX defines for the cpu/ppc4xx directory.Feng Kan2008-07-11-0/+33
| | | | | Signed-off-by: Feng Kan <fkan@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add 405EX(r) revision C PVR definitions and detection codeStefan Roese2008-05-13-0/+20
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)Stefan Roese2008-03-15-2/+43
| | | | | | This patch adds basic support for the AMCC 460EX/460GT PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable 405EX PCIe UTL register configurationStefan Roese2007-11-16-2/+0
| | | | | | | | Till now the UTL registers on 405EX were not initialized but left with their default values. This patch new initializes some of the UTL registers on 405EX. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make output a little shorter on I2C bootrom detectionStefan Roese2007-11-09-34/+19
| | | | | | | | | | | Most 4xx PPC capable of using an I2C bootrom for bootstrap setting already print a line with the information which I2C bootrom is used for bootstrap configuration. So we don't need this extra line with "I2C boot EEPROM en-/dis-abled". This patch also has a little code cleanup integrated. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add PPC405EX supportStefan Roese2007-10-31-17/+46
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Fix ppc4xx bootstrap letter displayed on startupBenoît Monin2007-06-04-1/+7
| | | | | | | | | | | | The attached patch is mainly cosmetic, allowing u-boot to display the correct bootstrap option letter according to the datasheets. The original patch was extended with 405EZ support by Stefan Roese. Signed-off-by: Benoit Monin <bmonin@adeneo.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add output for bootrom location to 405EZ portsStefan Roese2007-04-18-4/+26
| | | | | | | | | | | | | | Now 405EZ ports also show upon bootup from which boot device they are configured to boot: U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05) CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz) Bootstrap Option E - Boot ROM Location EBC (32 bits) 16 kB I-Cache 16 kB D-Cache Board: Acadia - AMCC PPC405EZ Evaluation Board Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add AMCC PPC405EZ supportStefan Roese2007-03-21-5/+13
| | | | | | | | | | This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boardsStefan Roese2007-02-02-6/+10
| | | | | | | | Previously the strapping DCR/SDR was read to determine if the internal PCI arbiter is enabled or not. This strapping bit can be overridden, so now the current status is read from the correct DCR/SDR register. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440EPx/440GRx cpu detectionStefan Roese2007-01-31-4/+8
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Fix 440SPe rev B detection from previous patchStefan Roese2007-01-15-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-4/+24
| | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: 440SP Rev. C detection addedStefan Roese2006-11-28-0/+4
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] 4xx: Fix problem with board specific reset code (now for real)Stefan Roese2006-11-27-1/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] 4xx: Fix problem with board specific reset codeStefan Roese2006-11-27-0/+3
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update Prodrive ALPR board support (440GX)Stefan Roese2006-11-27-2/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-10-6/+14
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| * Cleanup compile warnings. Prepare for release 1.1.5Wolfgang Denk2006-10-20-3/+3
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| * Make 4xx bootup message shorter on 440EPx/GRx platformsStefan Roese2006-10-18-4/+12
| | | | | | | | Patch by Stefan Roese, 18 Oct 2006
* | Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-12/+8
|/ | | | Patch by Stefan Roese, 07 Oct 2006
* Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-13/+96
| | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-0/+11
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* Cleanup config file and bootup output for Yucca board.Marian Balakowicz2006-07-03-2/+4
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* Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-4/+14
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| * Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-4/+14
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* | Fix problem in PVR detection for 440GRStefan Roese2006-05-18-1/+1
| | | | | | | | Patch by Stefan Roese, 18 May 2006
* | Add support for AMCC 440EP Rev C and 440GR Rev BStefan Roese2006-05-10-1/+9
| | | | | | | | Patch by John Otken, 08 May 2006
* | GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-1/+4
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* (no commit message)Wolfgang Denk2005-12-12-1/+1
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* Compile warning fixedStefan Roese2005-11-29-1/+1
| | | | Patch by Stefan Roese, 29 Nov 2005
* Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.Stefan Roese2005-11-29-27/+67
| | | | Patch by John Otken, 23 Nov 2005
* Changed PPC44x startup message (cpu info, speed...) to common style:Stefan Roese2005-11-27-102/+131
| | | | | | | | | | | On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional informations like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005
* Add support for Ocotea pass 3 with 440GX Rev. FStefan Roese2005-11-01-0/+3
| | | | Patch by Stefan Roese, 01 Nov 2005
* Fix 440GR to print correct cpu revisionStefan Roese2005-10-04-11/+8
| | | | Patch by Stefan Roese, 4 Oct 2005
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