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path: root/cpu/ppc4xx/44x_spd_ddr2.c
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* ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese2007-06-01-1/+6
| | | | | | | Add config option for 180 degree advance clock control as needed for the AMCC Luan eval board. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xxWolfgang Denk2007-04-18-1/+1
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| * Merge with /home/git/u-bootWolfgang Denk2007-03-08-25/+39
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| * | Some code cleanup.Wolfgang Denk2007-03-04-5/+5
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* | | ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese2007-03-31-19/+49
| | | | | | | | | | | | | | | | | | | | | Additional RAM information is now printed upon powerup, like DDR2 frequency and CAS latency. Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese2007-03-31-48/+81
| |/ |/| | | | | | | | | | | | | Fix a bug in the auto calibration routine. This driver now runs more reliable with the tested modules. It's also tested with 167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-03-08-25/+39
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| * | ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SPStefan Roese2007-03-08-25/+39
| |/ | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Restructure POST directory to support of other CPUs, boards, etc.Wolfgang Denk2007-03-06-4/+4
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* Merge with /home/stefan/git/u-boot/denx-merge-srStefan Roese2007-03-01-14/+14
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| * Minor code cleanup.Wolfgang Denk2007-02-27-17/+17
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* | [PATCH] Update AMCC Katmai 440SPe eval board supportStefan Roese2007-03-01-97/+278
|/ | | | | | | | | | | This patch updates the recently added Katmai board support. The biggest change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2 driver. Please note, that still some problems are left with some memory configurations. See the driver for more details. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM supportStefan Roese2007-02-20-0/+2759
This patch adds support for the DDR2 controller used on the 440SP and 440SPe. It is tested on the Katmai (440SPe) eval board and works fine with the following DIMM modules: - Corsair CM2X512-5400C4 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM) This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. Signed-off-by: Stefan Roese <sr@denx.de>
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