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* Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-07-16-1/+1
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| * Update CHANGELOG, minor coding style cleanup.Wolfgang Denk2007-07-12-1/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc4xx: Code cleanupStefan Roese2007-07-16-1/+0
|/ | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/hs/Atronic/u-bootWolfgang Denk2007-07-09-9/+19
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| * [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANGHeiko Schocher2007-06-25-15/+17
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * [PCS440EP] upgrade the PCS440EP board:Heiko Schocher2007-06-22-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | - Show on the Status LEDs, some States of the board. - Get the MAC addresses from the EEProm - use PREBOOT - use the CF on the board. - check the U-Boot image in the Flash with a SHA1 checksum. - use dynamic TLB entries generation for the SDRAM Signed-off-by: Heiko Schocher <hs@denx.de>
* | Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk2007-06-22-2/+2
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* | [ppc4xx] Extend program_tlb() with virtual & physical addressesStefan Roese2007-06-14-2/+2
|/ | | | | | | | | Now program_tlb() allows to program a TLB (or multiple) with different virtual and physical addresses. With this change, now one physical region (e.g. SDRAM) can be mapped 2 times, once with caches diabled and once with caches enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: 44x DDR driver code cleanup and small fix for BambooStefan Roese2007-06-01-175/+166
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM'sStefan Roese2007-03-07-4/+27
| | | | | | | | | | | | | | | | | This patch fixes a problem that occurs when 2 DIMM's are used. This problem was first spotted and fixed by Gerald Jackson <gerald.jackson@reaonixsecurity.com> but this patch fixes the problem in a little more clever way. This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. As this feature is new to the "old" 44x SPD DDR driver, it has to be enabled via the CONFIG_PROG_SDRAM_TLB define. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 filesStefan Roese2007-02-20-0/+1426
Since the existing 4xx SPD SDRAM initialization routines for the 405 SDRAM controller and the 440 DDR controller don't have much in common this patch splits both drivers into different files. This is in preparation for the 440 DDR2 controller support (440SP/e). Signed-off-by: Stefan Roese <sr@denx.de>
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