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* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-12/+12
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* SPI API improvementsHaavard Skinnemoen2008-06-03-21/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
* Patches by Stephan Linz, 30 Jan 2004:wdenk2004-02-09-0/+158
1: - board/altera/common/flash.c:flash_erase(): o allow interrupts befor get_timer() call o check-up each erased sector and avoid unexpected timeouts - board/altera/dk1c20/dk1s10.c:board_early_init_f(): o enclose sevenseg_set() in cpp condition - remove the ASMI configuration for DK1S10_standard_32 (never present) - fix some typed in mistakes in the NIOS documentation 2: - split DK1C20 configuration into several header files: o two new files for each NIOS CPU description o U-Boot related part is remaining in DK1C20.h 3: - split DK1S10 configuration into several header files: o two new files for each NIOS CPU description o U-Boot related part is remaining in DK1S10.h 4: - Add support for the Microtronix Linux Development Kit NIOS CPU configuration at the Altera Nios Development Kit, Stratix Edition (DK-1S10) 5: - Add documentation for the Altera Nios Development Kit, Stratix Edition (DK-1S10) 6: - Add support for the Nios Serial Peripharel Interface (SPI) (master only) 7: - Add support for the common U-Boot SPI framework at RTC driver DS1306