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* fsl-ddr: clean up the ddr code for DDR3 controllerDave Liu2009-01-23-11/+13
* fsl-ddr: update the bit mask for DDR3 controllerDave Liu2009-01-23-4/+8
* fsl ddr skip interleaving if not supported.Ed Swarthout2008-12-03-12/+17
* Add debug information for DDR controller registersHaiying Wang2008-10-18-0/+13
* Check DDR interleaving modeHaiying Wang2008-10-18-5/+112
* Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-18-87/+7
* Make DDR interleaving mode work correctlyHaiying Wang2008-10-18-12/+54
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-7/+7
* Coding style cleanup, update CHANGELOGWolfgang Denk2008-09-13-15/+15
* Fix compiler warning in mpc8xxx ddr codeKumar Gala2008-09-07-2/+4
* FSL DDR: Add DDR2 DIMM paramter supportKumar Gala2008-08-27-0/+339
* FSL DDR: Add DDR1 DIMM paramter supportKumar Gala2008-08-27-0/+343
* FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.Kumar Gala2008-08-27-0/+2418
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