index
:
arm-boot/u-boot-imx.git
imx_3.14.38_6ul_engr
imx_v2009.08
imx_v2009.08_1.1.0
imx_v2009.08_10.04.01
imx_v2009.08_10.05.02
imx_v2009.08_10.07.11
imx_v2009.08_10.10.01
imx_v2009.08_10.11.01
imx_v2009.08_10.12.01
imx_v2009.08_11.04.01
imx_v2009.08_11.05.01
imx_v2009.08_11.09.01
imx_v2009.08_11.11.01
imx_v2009.08_12.01.01
imx_v2009.08_12.02.01
imx_v2009.08_12.09.01
imx_v2009.08_12.10.02
imx_v2009.08_3.0.0
imx_v2009.08_3.0.35_4.0.0
imx_v2009.08_3.0.35_4.1.0
imx_v2009.08_r13.4.y
imx_v2013.04_3.10.17_1.0.0_beta
imx_v2013.04_3.10.17_1.0.0_ga
imx_v2013.04_3.10.31_1.1.0_alpha
imx_v2013.04_3.10.9_1.0.0_alpha
imx_v2013.04_3.5.7_1.0.0_alpha
imx_v2014.04_3.10.31_1.1.0_beta
imx_v2014.04_3.10.31_1.1.0_beta2
imx_v2014.04_3.10.53_1.1.0_ga
imx_v2014.04_3.14.28_1.0.0_ga
imx_v2014.04_3.14.28_7d_alpha
imx_v2014.04_3.14.38_6qp_beta
imx_v2014.04_kk4.4.3_2.y
imx_v2015.04
imx_v2015.04_3.14.38_6qp_ga
imx_v2015.04_3.14.38_6ul7d_beta
imx_v2015.04_3.14.38_6ul_ga
imx_v2015.04_3.14.52_1.1.0_ga
imx_v2015.04_4.1.15_1.0.0_ga
imx_v2015.04_brillo
imx_v2016.03_4.1.15_2.0.0_ga
imx_v2016.03_4.1.30_7ulp_alpha
imx_v2016.03_4.1.33_7ulp_beta
imx_v2017.03_4.9.11_1.0.0_ga
isee_imx_v2017.03_4.9.11_1.0.0_ga
isee_imx_v2017.03_4.9.11_1.0.0_ga_TEST
maddev-imx-android-r10.3
maddev-imx-android-r13.2
master
scm-imx_v2016.03_4.1.15_2.0.0_ga
U-boot NXP imx6
git@iatec.biz
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
cpu
/
mpc8xxx
/
ddr
Commit message (
Expand
)
Author
Age
Lines
*
fsl-ddr: Allow system to boot if we have more than 4G of memory
Kumar Gala
2009-02-16
-1
/
+1
*
fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller
Kumar Gala
2009-02-16
-0
/
+4
*
fsl-ddr: use the 1T timing as default configuration
Dave Liu
2009-01-23
-1
/
+1
*
fsl-ddr: make the self refresh idle threshold configurable
Dave Liu
2009-01-23
-4
/
+8
*
fsl-ddr: clean up the ddr code for DDR3 controller
Dave Liu
2009-01-23
-11
/
+13
*
fsl-ddr: update the bit mask for DDR3 controller
Dave Liu
2009-01-23
-4
/
+8
*
fsl ddr skip interleaving if not supported.
Ed Swarthout
2008-12-03
-12
/
+17
*
Add debug information for DDR controller registers
Haiying Wang
2008-10-18
-0
/
+13
*
Check DDR interleaving mode
Haiying Wang
2008-10-18
-5
/
+112
*
Pass dimm parameters to populate populate controller options
Haiying Wang
2008-10-18
-87
/
+7
*
Make DDR interleaving mode work correctly
Haiying Wang
2008-10-18
-12
/
+54
*
rename CFG_ macros to CONFIG_SYS
Jean-Christophe PLAGNIOL-VILLARD
2008-10-18
-7
/
+7
*
Coding style cleanup, update CHANGELOG
Wolfgang Denk
2008-09-13
-15
/
+15
*
Fix compiler warning in mpc8xxx ddr code
Kumar Gala
2008-09-07
-2
/
+4
*
FSL DDR: Add DDR2 DIMM paramter support
Kumar Gala
2008-08-27
-0
/
+339
*
FSL DDR: Add DDR1 DIMM paramter support
Kumar Gala
2008-08-27
-0
/
+343
*
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
Kumar Gala
2008-08-27
-0
/
+2418