Commit message (Expand) | Author | Age | Lines | |
---|---|---|---|---|
* | fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT | Kumar Gala | 2009-06-12 | -2/+1 |
* | fsl-ddr: add the DDR3 SPD infrastructure | Dave Liu | 2009-03-30 | -36/+344 |
* | fsl-ddr: Fix two bugs in the ddr infrastructure | Dave Liu | 2009-03-30 | -1/+4 |
* | fsl-ddr: make the self refresh idle threshold configurable | Dave Liu | 2009-01-23 | -4/+8 |
* | fsl-ddr: clean up the ddr code for DDR3 controller | Dave Liu | 2009-01-23 | -11/+13 |
* | fsl-ddr: update the bit mask for DDR3 controller | Dave Liu | 2009-01-23 | -4/+8 |
* | Add debug information for DDR controller registers | Haiying Wang | 2008-10-18 | -0/+13 |
* | Make DDR interleaving mode work correctly | Haiying Wang | 2008-10-18 | -12/+49 |
* | Fix compiler warning in mpc8xxx ddr code | Kumar Gala | 2008-09-07 | -2/+4 |
* | FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. | Kumar Gala | 2008-08-27 | -0/+993 |