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* Big white-space cleanup.Wolfgang Denk2008-05-21-8/+8
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* 7450 and 86xx L2 cache invalidate bug correctionsWheatley Travis2008-05-09-1/+1
| | | | | | | | | | | | | | The 7610 and related parts have an L2IP bit in the L2CR that is monitored to signal when the L2 cache invalidate is complete whereas the 7450 and related parts utilize L2I for this purpose. However, the current code does not account for this difference. Additionally the 86xx L2 cache invalidate code used an "andi" instruction where an "andis" instruction should have been used. This patch addresses both of these bugs. Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com> Acked-By: Jon Loeliger <jdl@freescale.com>
* Fix calculation of I2C clock for some 86xx chipsTimur Tabi2008-04-30-1/+13
| | | | | | | | | Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2. There is no pattern that can be used to determine which chips use which frequency, so the only way to determine is to look up the actual SOC designation and use the right value for that SOC. Signed-off-by: Timur Tabi <timur@freescale.com>
* 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-29-2/+2
| | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update SVR numbers to expand supportAndy Fleming2008-03-26-1/+1
| | | | | | | | | | | | | FSL has taken to using SVR[16:23] as an SOC sub-version field. This is used to distinguish certain variants within an SOC family. To account for this, we add the SVR_SOC_VER() macro, and update the SVR_* constants to reflect the larger value. We also add SVR numbers for all of the current variants. Finally, to make things neater, rather than use an enormous switch statement to print out the CPU type, we create and array of SVR/name pairs (using a macro), and print out the CPU name that matches the SVR SOC version. Signed-off-by: Andy Fleming <afleming@freescale.com>
* 86xx: Convert sbc8641d to use libfdt.Jon Loeliger2008-02-18-66/+47
| | | | | | | | | | | | | | | This is the proper fix for a missing closing brace in the function ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com. The ft_cpu_setup() function in mpc8641hpcn.c should have been removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE, but was missed. Only, the sbc8641d was nominally still using it. It all got ripped out, and the funcality that was in ft_board_setup() was refactored to remove the CPU portions into the new file cpu/mpc86xx/fdt.c instead. Make sbc8641d use this now. Based loosely on an original patch from joe.hamman@embeddedspecialties.com Signed-off-by: Jon Loeliger <jdl@freescale.com>
* mpc86xx: Fix unused variable 'config' and 'immap'Jean-Christophe PLAGNIOL-VILLARD2008-02-18-4/+6
| | | | | | and remove useless CONFIG_DDR_INTERLEAVE Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mpc86xx: Fix implicit declaration of functions 'init_laws' and 'disable_law'Jean-Christophe PLAGNIOL-VILLARD2008-02-18-0/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xxWolfgang Denk2008-02-15-79/+108
|\ | | | | | | | | | | | | | | Conflicts: common/cmd_reginfo.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 86xx: Add reginfo commandBecky Bruce2008-01-24-1/+23
| | | | | | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * 86xx: Remove old-style law setup codeBecky Bruce2008-01-24-32/+0
| | | | | | | | | | | | This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * 86xx: Support new law setup method and convert mpc8641Becky Bruce2008-01-24-1/+24
| | | | | | | | | | | | | | | | Adds the support code in cpu/mpc86xx for the new law setup code recently created fsl_law.c, and changes the MPC8641HPCN config to use this code. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * 86xx: Rearrange the sequence in start.SBecky Bruce2008-01-24-53/+69
| | | | | | | | | | | | | | | | | | | | | | | | * split the BAT initialization so that only 2 BATs (for the boot page and stack) are programmed very early on. The rest are initialized later. * Move other BAT setup, ccsrbar setup, and law setup later in the code after translation has been enabled. These changes will facilitate the moving of law and BAT initialization to C code, and will aid with 36-bit physical addressing support. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | 85xx, 86xx: Determine I2C clock frequencies and store in global_dataTimur Tabi2008-02-14-0/+2
| | | | | | | | | | | | | | | | | | Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx. Update the get_clocks() function in 85xx and 86xx to determine the I2C clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk. Signed-off-by: Timur Tabi <timur@freescale.com>
* | PPC: Use r2 instead of r29 as global data pointerWolfgang Denk2008-02-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc will refuse to use load/store multiple insns; instead, it issues a list of simple load/store instructions upon function entry and exit, resulting in bigger code size, which in turn makes the build for a few boards fail. Use r2 instead. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc: Refactor cache routines, so there is only one common set.Rafal Jaworowski2008-02-14-44/+0
|/ | | | Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
* 86xx: Support 2GB DIMMsBecky Bruce2008-01-10-1/+10
| | | | | | | | Configure the number of bits used to address the banks inside the SDRAM device. The default register value of 0 means 2 bits to address 4 banks. Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks. Signed-off-by: Becky Bruce <bgill@freescale.com>
* Merge commit 'remotes/wd/master'Jon Loeliger2007-11-20-1/+6
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| * Fix compiler warnings for PPC systems. Update CHANGELOG.Wolfgang Denk2007-11-18-1/+6
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 86xx: Fix broken variable reference when #def DEBUGing.Jon Loeliger2007-11-17-2/+4
| | | | | | | | | | | | Sometimes you can't reference the DDR2 controller variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * make 8610 board use pixis resetJason Jin2007-11-17-2/+2
| | | | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* | make 8610 board use pixis resetJason Jin2007-11-07-2/+2
| | | | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* | 86xx: Fix broken variable reference when #def DEBUGing.Jon Loeliger2007-11-07-2/+4
| | | | | | | | | | | | Sometimes you can't reference the DDR2 controller variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | Initial mpc8610hpcd cpu/, README and include/ files.Jon Loeliger2007-10-17-2/+13
|/ | | | | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Allow for fewer DDR slots per memory controller.Jon Loeliger2007-10-16-9/+21
| | | | | | | | | | | | | As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as globalWolfgang Denk2007-09-15-4/+5
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* cpu/86xx fixes.Jon Loeliger2007-08-10-97/+51
| | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Make MPC8641's PCI/PCI-E driver a common driver for many FSL parts.Ed Swarthout2007-08-06-346/+2
| | | | | | | | | | | | | | | | | | All of the PCI/PCI-Express driver and initialization code that was in the MPC8641HPCN port has now been moved into the common drivers/fsl_pci_init.c. In a subsequent patch, this will be utilized by the 85xx ports as well. Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added. Also enable the second PCI-Express controller on 8641 by getting its BATS and CFG_ setup right. Fixed a u16 vendor compiler warning in AHCI driver too. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix build errors and warnings / code cleanup.Wolfgang Denk2007-08-02-3/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc86xx: Remove old CFG_CMD_* references.Jon Loeliger2007-07-05-6/+6
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* cpu/mpc*/ : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).Jon Loeliger2007-07-04-6/+6
| | | | | | | | | | | | | | This is a compatibility step that allows both the older form and the new form to co-exist for a while until the older can be removed entirely. All transformations are of the form: Before: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) After: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT) Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk2007-07-03-4/+4
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| * Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-4/+4
| | | | | | | | | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | [ppc] Fix build breakage for all non-4xx PowerPC variants.Rafal Jaworowski2007-06-22-2/+2
| | | | | | | | | | - adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros - minor 4xx cleanup
* | mpc8641 image size cleanupEd Swarthout2007-06-05-2/+0
|/ | | | | | | | | | | e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Conditionalize 8641 Rev1.0 MCM workaroundsJames Yang2007-05-01-14/+28
| | | | | Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Rewrote picos_to_clk() to avoid rounding errors.James Yang2007-05-01-8/+20
| | | | | | | | Clarified that conversion is to DRAM clocks rather than platform clocks. Made function static to spd_sdram.c. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* mpc86xx; Write MAC address to mac-address and local-mac-addressJon Loeliger2007-04-20-0/+12
| | | | | | | | | | Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, ftp_cpu_setup() should write the MAC address to mac-address and local-mac-address, if they exist. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* mpc86xx: protect memcpy to bad address if a mac-address is missing from dtJon Loeliger2007-04-20-4/+8
| | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Add PIXIS FPGA support for MPC8641HPCN board.Haiying Wang2007-04-09-7/+1
| | | | | | | | | | | | | | | | Move the 8641HPCN's PIXIS code to the new directory board/freescale/common/ as it will be shared by future boards not in the same processor family. Write a "pixis_reset" command that utilizes the FPGA reset sequencer to support alternate soft-reset options such as using the "alternate" flash bank, enabling the watch dog, or choosing different CPU frequencies. Add documentation for the pixis_reset to README.mpc8641hpcn. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Set Rev 2.x 86xx PIC in mixed mode.Haiying Wang2007-03-22-0/+20
| | | | | | | | | Prevent false interrupt from hanging Linux as MSR[EE] is set to enable interrupts by changing the PIC out of the default pass through mode into mixed mode. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Add support for 8641 Rev 2 silicon.Ed Swarthout2007-03-22-2/+2
| | | | | | | | Without this patch, I am unable to get to the prompt on rev 2 silicon. Only set ddrioovcr for rev1. Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* MPC86xx: Cleaned up unused and conditionally used local variables.Jon Loeliger2006-10-27-6/+2
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix "ar" flags in some Makefiles to allow for silent "make -s"Wolfgang Denk2006-10-27-1/+1
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* Code cleanupWolfgang Denk2006-10-24-165/+165
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* Moved i2c driver out of cpu/mpc86xx/i2c.c into drivers/fsl_i2c.cJon Loeliger2006-10-19-270/+1
| | | | | | | in an effort to begin to unify the umpteen FSL I2C drivers that are all otherwise very similar. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Coding style changes to remove local varible blocksJon Loeliger2006-10-10-74/+64
| | | | and reformat a bit nicer.
* Fix whitespace issues.Jon Loeliger2006-10-10-1/+0
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* Merge branch 'mpc86xx'Jon Loeliger2006-09-29-0/+2
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| * Fix missing tCycle/modfreq calculation.John Traill2006-09-29-0/+2
| | | | | | | | Signed-off-by: John Traill <john.traill@freescale.com>
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