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* relocation: Do not relocate NULL pointers.Joakim Tjernlund2009-10-08-2/+4
| | | | | | | | | | NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2008-12-16-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Update U-Boot's build timestamp on every compilePeter Tyser2008-12-06-1/+2
| | | | | | | Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* mpc8641: Support 36-bit physical addressingBecky Bruce2008-11-10-11/+33
| | | | | | | | | | | | | | | | | | This patch creates a memory map with all the devices in 36-bit physical space, in addition to the 32-bit map. The CCSR relocation is moved (again, sorry) to allow for the physical address to be 36 bits - this requires translation to be enabled. With 36-bit physical addressing enabled, we are no longer running with VA=PA translations. This means we have to distinguish between the two in the config file. The existing region name is used to indicate the virtual address, and a _PHYS variety is created to represent the physical address. Large physical addressing is not enabled by default. Set CONFIG_PHYS_64BIT in the config file to turn this on. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc8641: Change 32-bit memory mapBecky Bruce2008-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | The memory map on the 8641hpcn is modified to look more like the 85xx boards; this is a step towards a more standardized layout going forward. As part of this change, we now relocate the flash. The regions for some of the mappings were far larger than they needed to be. I have reduced the mappings to match the actual sizes supported by the hardware. In addition I have removed the comments at the head of the BAT blocks in the config file, rather than updating them. These get horribly out of date, and it's a simple matter to look at the defines to see what they are set to since everything is right here in the same file. Documentation has been changed to reflect the new map, as this change is user visible, and affects the OS which runs post-uboot. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLYBecky Bruce2008-11-10-10/+10
| | | | | | | | | | | We define CONFIG_MONITOR_BASE_EARLY to define the initial location of the bootpage in flash. Use this to create an early mapping definition for the FLASH, and change the early_bats code to use this. This change facilitates the relocation of the flash since the early mappings are no longer tied to the final location of the flash. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc86xx: Use SRR0/1/rfi to enable address translation, not blrBecky Bruce2008-11-10-11/+8
| | | | | | | | | | Using a mtmsr/blr means that you have to be executing at the same virtual address once you enable translation. This is unnecessarily restrictive, and is not really how this is usually done. Change it to use the more common mtspr SRR0/SRR1 and rfi method. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc86xx: Move setup_bats into cpu_init_fBecky Bruce2008-11-10-5/+0
| | | | | | | | | | | In order to later allow for a physical relocation of the flash, setup_bats, which sets up the final BAT mapping for the board, needs to happen *after* init_laws(). Otherwise, there will be no window programmed for the flash at the new physical location at the point when we change the mmu translation. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* powerpc: change 86xx SMP boot methodBecky Bruce2008-11-04-73/+4
| | | | | | | | | We put the bootpg for the secondary cpus into memory and use BPTR to get to it. This is a step towards converting to the ePAPR boot methodology. Also, the code is written to deal properly with more than 4GB of RAM. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* powerpc 86xx: Handle CCSR relocation earlierBecky Bruce2008-11-03-5/+24
| | | | | | | | | | | | | | | Currently, the CCSR gets relocated while translation is enabled, meaning we need 2 BAT translations to get to both the old location and the new location. Also, the DEFAULT CCSR location has a dependency on the BAT that maps the FLASH region. Moving the relocation removes this unnecessary dependency. This makes it easier and more intutive to modify the board's memory map. Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same BAT for CCSR space. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: remove the redundant r2 global data pointer saveDave Liu2008-10-30-1/+0
| | | | | | | | | | The commit 67256678f00c09b0a7f19e862e5c1847553d31bc add the another global data pointer save, but in fact the global data pointer will be initialized in the board_init_r, so remove it such as the 85xx/83xx family. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Kumar Gala <kumar.gala@freescale.com>
* 86xx: remove the unused code for 86xx familyDave Liu2008-10-30-14/+0
| | | | | | | | I believe these code was copied from 74xx family, but for 86xx, it is unused. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Kumar Gala <kumar.gala@freescale.com>
* 86xx: Move the clear_tlbs before MMU turn onDave Liu2008-10-30-1/+4
| | | | | | | | | | We must invalidate TLBs before MMU turn on, but currently the code is not, if there are some stale TLB entry valid in the TLBs, it will cause strange issue. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-50/+50
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cacheNick Spence2008-10-13-4/+4
| | | | | | | | | | This is needed in unlock_ram_in_cache() because it is called from C and will corrupt the small data area anchor that is kept in R2. lock_ram_in_cache() is modified similarly as good coding practice, but is not called from C. Signed-off-by: Nick Spence <nick.spence@freescale.com>
* POWERPC 86xx: Move BAT setup code to CBecky Bruce2008-08-11-119/+0
| | | | | | | | | | This is needed because we will be possibly be locating devices at physical addresses above 32bits, and the asm preprocessing does not appear to deal with ULL constants properly. We now call write_bat in lib_ppc/bat_rw.c. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-7/+7
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xxWolfgang Denk2008-02-15-53/+66
|\ | | | | | | | | | | | | | | Conflicts: common/cmd_reginfo.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 86xx: Remove old-style law setup codeBecky Bruce2008-01-24-5/+0
| | | | | | | | | | | | This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * 86xx: Support new law setup method and convert mpc8641Becky Bruce2008-01-24-0/+2
| | | | | | | | | | | | | | | | Adds the support code in cpu/mpc86xx for the new law setup code recently created fsl_law.c, and changes the MPC8641HPCN config to use this code. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * 86xx: Rearrange the sequence in start.SBecky Bruce2008-01-24-53/+69
| | | | | | | | | | | | | | | | | | | | | | | | * split the BAT initialization so that only 2 BATs (for the boot page and stack) are programmed very early on. The rest are initialized later. * Move other BAT setup, ccsrbar setup, and law setup later in the code after translation has been enabled. These changes will facilitate the moving of law and BAT initialization to C code, and will aid with 36-bit physical addressing support. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | PPC: Use r2 instead of r29 as global data pointerWolfgang Denk2008-02-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc will refuse to use load/store multiple insns; instead, it issues a list of simple load/store instructions upon function entry and exit, resulting in bigger code size, which in turn makes the build for a few boards fail. Use r2 instead. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc: Refactor cache routines, so there is only one common set.Rafal Jaworowski2008-02-14-44/+0
|/ | | | Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
* cpu/86xx fixes.Jon Loeliger2007-08-10-71/+14
| | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* [ppc] Fix build breakage for all non-4xx PowerPC variants.Rafal Jaworowski2007-06-22-2/+2
| | | | | - adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros - minor 4xx cleanup
* Conditionalize 8641 Rev1.0 MCM workaroundsJames Yang2007-05-01-14/+28
| | | | | Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Code cleanupWolfgang Denk2006-10-24-165/+165
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* Fix whitespace issues.Jon Loeliger2006-10-10-1/+0
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* General indent and whitespace cleanups.Jon Loeliger2006-08-22-100/+97
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* Copy Global Data Pointer to r29 for DECLARE_GLOBAL_DATA_PTRHaiying Wang2006-08-17-1/+2
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* Do not enable address translation on secondary CPUs.Jon Loeliger2006-06-15-15/+0
| | | | | | Do not set up BATs on secondary CPUs. Let Linux do the nasty. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Change arbitration to round-robin for SMP linux.Jon Loeliger2006-05-19-6/+9
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* Remove unneeded INIT_RAM_LOCK cache twiddling.Haiying Wang2006-05-10-2/+3
| | | | | | Correctly tracks r29 as global data pointer now. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Cleanup whitespaces and style issues.Jon Loeliger2006-04-27-2/+2
| | | | | | | Removed //-style comments. Use 80-column lines. Remove trailing whitespace. Remove dead code and debug cruft.
* Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-0/+1240
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