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* 85xx: Add PORDEVSR_PCI1 definePeter Tyser2008-12-04-1/+1
* 85xx: Add CPU 2 errata workaround to all 8548 boardsPeter Tyser2008-12-03-0/+13
* Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-0/+18
* Moved initialization of FCC Ethernet controller to cpu_eth_initBen Warren2008-11-09-1/+4
* Fix typo in cpu/mpc85xx/cpu.cBen Warren2008-11-09-1/+1
* 85xx: Fix the incorrect register used for DDR erratum1Dave Liu2008-10-24-3/+6
* 85xx: Add basic e500mc core supportKumar Gala2008-10-24-0/+14
* 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic numberKumar Gala2008-10-24-2/+2
* Use strmhz() to format clock frequenciesWolfgang Denk2008-10-21-11/+15
* Merge 'next' branchWolfgang Denk2008-10-18-156/+221
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| * 85xx if NUM_CPUS>1, print cpu numberEd Swarthout2008-10-18-0/+5
| * Have u-boot pass stashing parameters into device treeAndy Fleming2008-10-18-0/+11
| * 85xx: Export invalidate_{i,d}cache and add flush_dcacheKumar Gala2008-10-18-0/+49
| * rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-156/+156
* | Revert "85xx: Using proper I2C source clock divider for MPC8544"Kumar Gala2008-10-17-2/+2
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* 85xx: Using proper I2C source clock divider for MPC8544Wolfgang Grandegger2008-10-08-2/+2
* Fix the incorrect DDR clk freq reporting on 8536DSJason Jin2008-10-07-2/+4
* 85xx: Remove setting of *cache-line-size in device treesKumar Gala2008-10-07-3/+0
* Fix printf errors under -DDEBUGAndrew Klossner2008-09-09-7/+7
* 85xx: Ensure timebase is zero on secondary coresKumar Gala2008-09-09-0/+5
* Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.Sergei Poselenov2008-09-08-8/+7
* Pass in tsec_info struct through tsec_initializeAndy Fleming2008-09-02-23/+10
* mpc85xx: remove redudant code with lib_ppc/interrupts.cKumar Gala2008-08-27-97/+12
* mpc85xx: Add support for the MPC8536Kumar Gala2008-08-27-1/+199
* mpc85xx: Add support for the MPC8572DS reference boardKumar Gala2008-08-27-2/+2
* FSL DDR: Remove old SPD support from cpu/mpc85xxKumar Gala2008-08-27-1166/+0
* FSL DDR: Add 85xx specific register settingKumar Gala2008-08-27-0/+318
* FSL DDR: Add e500 TLB helper for DDR codeKumar Gala2008-08-27-0/+64
* FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.Kumar Gala2008-08-27-1/+10
* fdt: rework fdt_fixup_ethernet() to use env instead of bd_tKumar Gala2008-08-21-1/+1
* 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUSKumar Gala2008-08-12-3/+3
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-07-15-23/+42
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| * 85xx: Cleanup L2 cache size detectionKumar Gala2008-07-14-17/+30
| * 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreqPaul Gortmaker2008-07-14-1/+1
| * Change the temp map to ROM to align addresses to page size.Andrew Klossner2008-07-14-4/+5
| * mpc85xx: use IS_E_PROCESSOR macroKim Phillips2008-07-14-1/+1
| * fdt: add crypto node handling for MPC8{3, 5}xxE processorsKim Phillips2008-07-14-0/+5
* | Fix some more printf() format problems.Kumar Gala2008-07-14-2/+2
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* Fix printf errors.Andrew Klossner2008-07-09-4/+4
* Merge branch 'master' of git://www.denx.de/git/u-boot-netWolfgang Denk2008-07-09-0/+30
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| * Add mechanisms for CPU and board-specific Ethernet initializationBen Warren2008-07-06-0/+30
* | Coding Style CleanupWolfgang Denk2008-06-28-1/+1
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* Fix 4xx build issueAnatolij Gustschin2008-06-19-1/+1
* 85xx/86xx: Move to dynamic mgmt of LAWsKumar Gala2008-06-11-1/+1
* FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-17/+6
* Added the upmconfig() function for 85xx.Sergei Poselenov2008-06-11-0/+66
* MPC85xx: Beautify boot output of L2 cache configurationWolfgang Grandegger2008-06-10-9/+11
* 85xx: Add setting of cache props in the device tree.Kumar Gala2008-06-10-0/+128
* 85xx: expose cpu identificationKumar Gala2008-06-10-36/+40
* 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define itKumar Gala2008-06-09-2/+6
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