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* 85xx: MP Boot Page Translation updatePeter Tyser2009-10-27-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change has 3 goals: - Have secondary cores be released into spin loops at their 'true' address in SDRAM. Previously, secondary cores were put into spin loops in the 0xfffffxxx address range which required that boot page translation was always enabled while cores were in their spin loops. - Allow the TLB window that the primary core uses to access the secondary cores boot page to be placed at any address. Previously, a TLB window at 0xfffff000 was always used to access the seconary cores' boot page. This TLB address requirement overlapped with other peripherals on some boards (eg XPedite5370). By default, the boot page TLB will still use the 0xfffffxxx address range, but this can be overridden on a board-by-board basis by defining a custom CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page remains in use while U-Boot executes. Previously it was only temporarily used, then restored to its initial value. - Allow Boot Page Translation to be disabled on bootup. Previously, Boot Page Translation was always left enabled after secondary cores were brought out of reset. This caused the 0xfffffxxx address range to somewhat "magically" be translated to an address in SDRAM. Some boards may not want this oddity in their memory map, so defining CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after the secondary cores are initialized. These changes are only applicable to 85xx boards with CONFIG_MP defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Introduce determine_mp_bootpg() helper.Kumar Gala2009-04-01-2/+2
| | | | | | | | | | | | Match determine_mp_bootpg() that was added for 86xx. We need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. Also added a comment about how cpu_reset() is dealing w/an errata on early 85xx MP HW. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add cpu_mp_lmb_reserve helper to reserve boot pageKumar Gala2008-03-26-0/+1
| | | | | | | Provide a board_lmb_reserve helper function to ensure we reserve the page of memory we are using for the boot page translation code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Update multicore boot mechanism to ePAPR v0.81 specKumar Gala2008-03-26-0/+11
| | | | | | | | | | | | The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added support for multicore boot mechanismKumar Gala2008-03-26-0/+8
Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>