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path: root/cpu/mpc85xx/fdt.c
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* Have u-boot pass stashing parameters into device treeAndy Fleming2008-10-18-0/+11
| | | | | | | | | Some cores don't support ethernet stashing at all, and some instances have errata. Adds 3 properties to gianfar nodes which support stashing. For now, just add this support to 85xx SoCs. Signed-off-by: Andy Fleming <afleming@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 85xx: Remove setting of *cache-line-size in device treesKumar Gala2008-10-07-3/+0
| | | | | | | ePAPR says if the *cache-block-size is the same as *cache-line-size than we don't need the *cache-line-size property. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: rework fdt_fixup_ethernet() to use env instead of bd_tKumar Gala2008-08-21-1/+1
| | | | | | | | | | Move to using the environment variables 'ethaddr', 'eth1addr', etc.. instead of bd->bi_enetaddr, bi_enet1addr, etc. This makes the code a bit more flexible to the number of ethernet interfaces. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreqPaul Gortmaker2008-07-14-1/+1
| | | | | | | | | | Some boards that have external 16550 UARTs don't have a direct tie between bi_busfreq and the clock used for the UARTs. Boards that do have such a tie should set CFG_NS16550_CLK to be get_bus_freq(0) -- which most of them do already. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* fdt: add crypto node handling for MPC8{3, 5}xxE processorsKim Phillips2008-07-14-0/+5
| | | | | | | | Delete the crypto node if not on an E-processor. If on 8360 or 834x family, check rev and up-rev crypto node (to SEC rev. 2.4 property values) if on an 'EA' processor, e.g. MPC8349EA. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 85xx: Add setting of cache props in the device tree.Kumar Gala2008-06-10-0/+128
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix size of cpu-release-addr propertyKumar Gala2008-04-18-1/+1
| | | | | The cpu-release-addr is defined as always being a 64-bit quanity regardless if we are running on a 32-bit or 64-bit machine.
* 85xx: Update multicore boot mechanism to ePAPR v0.81 specKumar Gala2008-03-26-1/+1
| | | | | | | | | | | | The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix merge duplicationKumar Gala2008-03-26-49/+0
| | | | | | ft_fixup_cpu() got duplicated in some merge snafu. Remove the duplicate. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added support for multicore boot mechanismKumar Gala2008-03-26-0/+49
| | | | | | | | | | Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* 85xx: Added support for multicore boot mechanismKumar Gala2008-03-26-0/+52
| | | | | | | | | Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* QE: Move FDT support into a common fileKumar Gala2008-02-12-5/+3
| | | | | | | Move the flat device tree setup for QE related devices into a common file shared between 83xx & 85xx platforms that have QE's. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Add QE brg freq and correct qe bus freq fdt update codeKim Phillips2008-01-09-1/+3
| | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* 85xx: add ability to upload QE firmwareTimur Tabi2008-01-09-0/+1
| | | | | | | | | | | Define the layout of a binary blob that contains a QE firmware and instructions on how to upload it. Add function qe_upload_firmware() to parse the blob and perform the actual upload. Add command-line command "qe fw" to take a firmware blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the 'firmware' device tree node if U-Boot has uploaded a firmware. Fully define 'struct rsp' in immap_qe.h to include the actual RISC Special Registers. Signed-off-by: Timur Tabi <timur@freescale.com>
* Add libfdt based ft_cpu_setup for mpc85xxKumar Gala2007-12-11-0/+64
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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