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* Coding Style CleanupWolfgang Denk2008-06-28-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Fix 4xx build issueAnatolij Gustschin2008-06-19-1/+1
| | | | | | | | | | | | | | Building for 4xx doesn't work since commit 4dbdb768: In file included from 4xx_pcie.c:28: include/asm/processor.h:971: error: expected ')' before 'ver' make[1]: *** [4xx_pcie.o] Error 1 This patch fixes the problem. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Added the upmconfig() function for 85xx.Sergei Poselenov2008-06-11-0/+66
| | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* MPC85xx: Beautify boot output of L2 cache configurationWolfgang Grandegger2008-06-10-1/+1
| | | | | | | | | | The boot output is now aligned poperly with other boot output lines, e.g.: FLASH: 128 MB L2: 512 KB enabled Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* 85xx: expose cpu identificationKumar Gala2008-06-10-36/+40
| | | | | | | | | | | | | The current cpu identification code is used just to return the name of the processor at boot. There are some other locations that the name is useful (device tree setup). Expose the functionality to other bits of code. Also, drop the 'E' suffix and add it on by looking at the SVR version when we print this out. This is mainly to allow the most flexible use of the name. The device tree code tends to not care about the 'E' suffix. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define itKumar Gala2008-06-09-2/+6
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fixed reset for socratesSergei Poselenov2008-05-20-9/+14
| | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* 85xx: Round up frequency calculations to get reasonable outputKumar Gala2008-04-24-7/+6
| | | | | | | | | | | eg. because of rounding error we can get 799Mhz instead of 800Mhz. Introduced DIV_ROUND_UP and roundup taken from linux kernel. Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: Show DDR memory data rate in addition to the memory clock frequency.James Yang2008-03-26-3/+6
| | | | | | | | | Show the DDR memory data rate in addition to the memory clock frequency. For DDR/DDR2 memories the memory data rate is 2x the memory clock. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: get_tbclk() speed up and rounding fixJames Yang2008-03-26-5/+3
| | | | | | | | | | Speed up get_tbclk() by referencing pre-computed bus clock frequency value from global data instead of sys_info_t. Fix rounding of result to nearest; previously it was rounding upwards. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update SVR numbers to expand supportAndy Fleming2008-03-26-37/+48
| | | | | | | | | | | | | FSL has taken to using SVR[16:23] as an SOC sub-version field. This is used to distinguish certain variants within an SOC family. To account for this, we add the SVR_SOC_VER() macro, and update the SVR_* constants to reflect the larger value. We also add SVR numbers for all of the current variants. Finally, to make things neater, rather than use an enormous switch statement to print out the CPU type, we create and array of SVR/name pairs (using a macro), and print out the CPU name that matches the SVR SOC version. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Handle Asynchronous DDR clock on 85xxKumar Gala2007-12-11-1/+15
| | | | | | | | | | The MPC8572 introduces the concept of an asynchronous DDR clock with regards to the platform clock. Introduce get_ddr_freq() to report the DDR freq regardless of sync/async mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Stop using immap_t on 85xxKumar Gala2007-12-11-8/+4
| | | | | | | | In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Remove CONFIG_OF_FLAT_TREE related code from mpc85xx since we now use libfdtKumar Gala2007-12-11-96/+0
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Setting MSR[DE] in do_reseturwithsughosh@gmail.com2007-10-19-1/+6
| | | | | | | | Hello, This patch ensures the soft reset of the board for the 85xx boards by setting the MSR[DE] in the do_reset function. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* Add support for UEC to 8568Andy Fleming2007-08-14-1/+23
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-1/+1
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Coding stylke cleanup; update CHANGELOG.Wolfgang Denk2007-05-05-9/+9
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add support for the 8568 MDS boardAndy Fleming2007-05-02-0/+7
| | | | | | | | | This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming <afleming@freescale.com>
* 85xx: write MAC address to mac-address and local-mac-addressTimur Tabi2007-04-23-0/+20
| | | | | | | | | Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, ftp_cpu_setup() should write the MAC address to mac-address and local-mac-address, if they exist. Signed-off-by: Timur Tabi <timur@freescale.com>
* Some 85xx cpu cleanupsAndy Fleming2007-04-23-3/+8
| | | | | | | | | * Cleaned up the TSR[WIS] clearing * Cleaned up DMA initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* Add cpu support for the 8544Andy Fleming2007-04-23-2/+8
| | | | | | | | Recognize new SVR values, and add a few register definitions Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* u-boot: Fix e500 v2 core reset bugZang Roy-r619112007-04-23-6/+15
| | | | | | | | The following patch fixes the e500 v2 core reset bug. For e500 v2 core, a new reset control register is added to reset the processor. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* * Add Flat Dev Tree construction for MPC85xx ADS and CDS boardsMatthew McClintock2006-06-28-1/+49
| | | | | | Patch by Jon Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-3/+18
| | | | | | | | Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
* * Fixes for TQM8560 board:wdenk2005-04-13-1/+1
| | | | | | | | | - fix clock rates - remove debug messages - fix flash sector protection * Patch by Steven Scholz, 07 Apr 2005: Fix warning in cpu/arm920t/at91rm9200/i2c.c
* Update code for TQM8540 board (and 85xx in general):wdenk2005-03-15-26/+24
| | | | | | | - Change the name of the Ethernet driver: MOTO ENET -> ENET - Reformat boot messages - Enable redundant environment - Replace the -O2 optimization flag with -mno-string
* Patch by Jon Loeliger, 17 June 2004:wdenk2004-07-09-10/+0
| | | | | | | | Completion of the 8540ADS/8560ADS updates: Fix some PCI and Rapid I/O memory maps, Initialize both TSEC 1 and 2, Initialize SDRAM Update MAINTAINER for 85xx boards and README.mpc85xxads
* Patches Part 1 by Jon Loeliger, 11 May 2004:wdenk2004-06-09-8/+83
| | | | | | | | | | | | | | | | | | | | | | Dynamically handle REV1 and REV2 MPC85xx parts. (Jon Loeliger, 10-May-2004). New consistent memory map and Local Access Window across MPC85xx line. New CCSRBAR at 0xE000_0000 now. Add RAPID I/O memory map. New memory map in README.MPC85xxads (Kumar Gala, 10-May-2004) Better board and CPU identification on MPC85xx boards at boot. (Jon Loeliger, 10-May-2004) SDRAM clock control fixes on MPC8540ADS & MPC8560 boards. Some configuration options for MPC8540ADS & MPC8560ADS cleaned up. (Jim Robertson, 10-May-2004) Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver. Supports multiple PHYs. (Andy Fleming, 10-May-2004) Some README.MPC85xxads updates. (Kumar Gala, 10-May-2004) Copyright updates for "Freescale" (Andy Fleming, 10-May-2004)
* * Patches by Xianghua Xiao, 15 Oct 2003:wdenk2003-10-15-0/+151
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
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