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* mpc83xx: add support configure bus parkingHeiko Schocher2010-01-07-0/+12
| | | | | | | | | | | | Add support to configure bus parking mode and master in bus arbitration configuration (ACR). Add this for the kmeter1 port: Configure bus arbiter with recommended values from Freescale to improve bus latency/throughput for application with intensive QuiccEngine activity. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: spd_sdram.c: Disable memory controller before initializingStefan Roese2010-01-07-0/+9
| | | | | | | | | | | | | | | | The memory controller could already be enabled, when spd_sdram() is called. This could be the case for example, when the SDRAM is initialized by the JTAG debugger. The "sync" after the register access via the accessor function is still needed, because the macro uses the sync before the real write is done. So until not all accesses are converted to using accessor functions, this sync still needs to be made "manually" here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd.eu> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: boot time regression, move LCRR setup back to cpu_init_fPeter Korsgaard2009-12-09-32/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c7190f02 (retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields) moved the LCRR assignment to after relocation to RAM because of the potential problem with changing the local bus clock while executing from flash. This change unfortunately adversely affects the boot time, as running all code up to cpu_init_r can cause significant slowdown. E.G. on a 8347 board a bootup time increase of ~600ms has been observed: 0.020 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz 0.168 RS: 232 0.172 I2C: ready 0.176 DRAM: 64 MB 1.236 FLASH: 32 MB Versus: 0.016 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz 0.092 RS: 232 0.092 I2C: ready 0.096 DRAM: 64 MB 0.644 FLASH: 32 MB So far no boards have needed the late LCRR setup, so simply revert it for now - If it is needed at a later time, those boards can either do their own final LCRR setup in board code (E.G. in board_early_init_r), or we can introduce a CONFIG_SYS_LCRR_LATE config option to only do the setup in cpu_init_r. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: mpc8313 - handle erratum IPIC1 (TSEC IRQ number swappage)Kim Phillips2009-10-16-0/+39
| | | | | | | | | mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1 h/w (see AN3545). The base device tree in use has rev. 1 ID numbers, so if on Rev. 2 (and higher) h/w, we fix them up here. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Reviewed-by: Roland Lezuo <roland.lezuo@chello.at>
* relocation: Do not relocate NULL pointers.Joakim Tjernlund2009-10-08-2/+4
| | | | | | | | | | NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* ppc: Enable full relocation to RAMPeter Tyser2009-10-03-1/+0
| | | | | | | | | | | | | The following changes allow U-Boot to fully relocate from flash to RAM: - Remove linker scripts' .fixup sections from the .text section - Add -mrelocatable to PLATFORM_RELFLAGS for all boards - Define CONFIG_RELOC_FIXUP_WORKS for all boards Previously, U-Boot would partially relocate, but statically initialized pointers needed to be manually relocated. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfieldsKim Phillips2009-09-26-107/+154
| | | | | | | | | | | | | | | | | | | some LCRR bits are not documented throughout the 83xx family RMs. New board porters copying similar board configurations might omit setting e.g., DBYP since it was not documented in their SoC's RM. Prevent them bricking their board by retaining power on reset values in bit fields that the board porter doesn't explicitly configure via CONFIG_SYS_<registername>_<bitfield> assignments in the board config file. also move LCRR assignment to cpu_init_r[am] to help ensure no transactions are being executed via the local bus while CLKDIV is being modified. also start to use i/o accessors. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx/serdes: License cleanup: remove "All Rights Reserved" noticeAnton Vorontsov2009-09-04-1/+1
| | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-1/+1
| | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove ↵Kim Phillips2009-07-27-2/+2
| | | | | | the former Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* usb: mpc834x: added support of the MPH USB controller in addition to the DR oneValeriy Glushkov2009-07-14-0/+2
| | | | | Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: USB: fix: access of ehci struct elementsVivek Mahajan2009-07-09-2/+2
| | | | | | | | | It fixes the access to the 'ehci' struct elements for mpc83xx which should have been taken care of in 4ef01010aa4799c759d75e67007fdd3a38c88c8a Sorry about that. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* 83xx: Add support for fsl_dma driverPeter Tyser2009-07-02-121/+4
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC referencesPeter Tyser2009-07-02-1/+1
| | | | | | | | | | Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures use Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Rename dma_xfer() to dmacpy()Peter Tyser2009-07-01-17/+16
| | | | | | | | Also update dmacpy()'s argument order to match memcpy's and use phys_addr_t/phy_size_t for address/size arguments Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* qe: Pass in uec_info struct through uec_initializeHaiying Wang2009-06-12-17/+3
| | | | | | | | | | | The uec driver contains code to hard code configuration information for the uec ethernet controllers. This patch creates an array of uec_info structures, which are then parsed by the corresponding driver instance to determine configuration. It also creates function uec_standard_init() to initialize all UEC interfaces for 83xx and 85xx. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc83xx: USB: Reorganized its supportVivek Mahajan2009-06-12-1/+18
| | | | | | | | | | | | | | | | | The following patch reorganizes/reworks the USB support for mpc83xx as under:- * Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to cpu/mpx83xx/cpu_init.c * Board specific usb_phy_type is read from the environment * Adds USB EHCI specific structure in include/usb/ehci-fsl.h * Copyrights revamped in most of the following files Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser2009-06-12-34/+34
| | | | | | | | Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xxPeter Tyser2009-06-12-1/+1
| | | | | | | | Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* General help message cleanupWolfgang Denk2009-06-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the help messages were not really helpful; for example, many commands that take no arguments would not print a correct synopsis line, but "No additional help available." which is not exactly wrong, but not helpful either. Commit ``Make "usage" messages more helpful.'' changed this partially. But it also became clear that lots of "Usage" and "Help" messages (fields "usage" and "help" in struct cmd_tbl_s respective) were actually redundant. This patch cleans this up - for example: Before: => help dtt dtt - Digital Thermometer and Thermostat Usage: dtt - Read temperature from digital thermometer and thermostat. After: => help dtt dtt - Read temperature from Digital Thermometer and Thermostat Usage: dtt Signed-off-by: Wolfgang Denk <wd@denx.de>
* 83xx: searching "muram-data" by compatible propertyHeiko Schocher2009-04-24-2/+2
| | | | | | | | | | | | if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU in the muram-data node, the reg entry needs to be updated. This is done in fdt_fixup_muram(), but we should use the compatible "fsl,qe-muram-data" for searching the node instead of searching the muram-data node with an absolute path. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* mpc83xx: Add bank configuration to FSL spd_sdram.cJerry Van Baren2009-03-14-6/+10
| | | | | | | | | The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8 bank SDRAMs. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: correctly set encryption and I2C bus 0 clockNorbert van Bolhuis2009-03-14-1/+1
| | | | | | | | | | This patch makes sure the correct mask is applied when setting the encryption and I2C bus 0 clock in SCCR. Failing to do so may lead to ENCCM being 0 in which case I2C bus 0 won't function. Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 8360, kmeter1: added bootcount feature.Heiko Schocher2009-03-05-0/+52
| | | | | | | | | | | | | | | | | | add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU. The bootcounter uses 8 bytes from the muram, because no other memory was found on this CPU for the bootcount feature. So we must correct the muram size in DTS before booting Linux. This feature is actual only implemented for MPC8360, because not all 83xx CPU have qe, and therefore no muram, which this feature uses. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Fix some bugs in spd sdram codeDave Liu2009-03-05-3/+23
| | | | | | | | | | | | | | | | | | | 1. RD_TO_PRE missed to add the AL, and need min 2 clocks for tRTP according to DDR2 JEDEC spec. 2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec. 3. add the support of DDR2-533,667,800 DIMMs 4. cpo 5. make the AL to min to gain better performance. The Micron MT9HTF6472CHY-667D1 DIMMs test passed on MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate. items 1, 2 and 5: Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: PCI: Fix hard-coded first_busno valueAnton Vorontsov2009-02-23-1/+1
| | | | | | | | | | | | | | | | | | | | | We should use pci_last_busno() in pci_init_bus(), otherwise we'll erroneously re-use PCI0's first_busno for PCI1 hoses. NOTE: The patch is untested. All MPC83xx FSL boards I have have PCI1 in miniPCI form, for which I don't have any cards handy. But looking in cpu/mpc85xx/pci.c: ... #ifdef CONFIG_MPC85XX_PCI2 hose = &pci_hose[1]; hose->first_busno = pci_hose[0].last_busno + 1; And considering that we do the same for MPC83xx PCI-E support, I think this patch is correct. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: PCI: Fix bus-range fdt fixups for PCI1 controllersAnton Vorontsov2009-02-23-2/+2
| | | | | | | | | | | This patch fixes copy-paste issue: pci_hose[0]'s first and last busnos were used to fixup pci1's nodes. We don't see this bug triggering only because Linux reenumerate buses anyway. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: PCIe: Fix CONFIG_PCI_SCAN_SHOW reporting bogus valuesAnton Vorontsov2009-02-23-2/+7
| | | | | | | | | This patch fixes an issue in config space read accessors: we should fill-in the value even if we fail (e.g. skipping devices), otherwise CONFIG_PCI_SCAN_SHOW reports bogus values during boot up. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: PCIe: Don't start bus enumeration at 0Anton Vorontsov2009-02-23-3/+1
| | | | | | | | | | | | | | | | | | | Currently we assign first_busno = 0 for the first PCIe hose, but this scheme won't work if we have ordinary PCI hose already registered (its first_busno value is 0 too). The old code worked fine only because we have PCI disabled on MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92e3b13f2b3 "mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards"). But on MPC837XERDB boards we have PCI and PCIe, so the bug actually triggers. So, to fix the issue, we should use pci_last_busno() + 1 for the first_busno (i.e. last available busno). Reported-by: Huang Changming <Chang-Ming.Huang@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Add eSDHC support on 8379 EMDS boardAndy Fleming2009-02-16-0/+14
| | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
* pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarityKumar Gala2009-02-07-3/+3
| | | | | | | | | | The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and can be confusing when reading the code. Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used for system memory mapping purposes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Command usage cleanupPeter Tyser2009-01-28-2/+2
| | | | | | | | Remove command name from all command "usage" fields and update common/command.c to display "name - usage" instead of just "usage". Also remove newlines from command usage fields. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Standardize command usage messages with cmd_usage()Peter Tyser2009-01-28-2/+2
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 83xx: Use the proper sequence for updating IMMR.Scott Wood2009-01-21-3/+15
| | | | | | | | | | | This ensures that subsequent accesses properly hit the new window. The dcbi during the NAND loop was accidentally working around this; it's no longer necessary, as the cache is not enabled. Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add support for MPC83xx PCI-E controllersAnton Vorontsov2009-01-21-2/+317
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MPC83xx PCI-E controllers in Root Complex mode. The patch is based on Tony Li and Dave Liu work[1]. Though unlike the original patch, by default we don't register PCI-E buses for use in U-Boot, we only configure the controllers for future use in other OSes (Linux). This is done because we don't have enough of spare BATs to map all the PCI-E regions. To actually use PCI-E in U-Boot, users should explicitly define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And only then U-Boot will able to access PCI-E, but at the cost of disabled address translation. [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: PCI agent mode fixes for multi-board systemsIra Snyder2009-01-21-0/+5
| | | | | | | | | | | | | | | | | | When running a system with 2 or more MPC8349EMDS boards in PCI agent mode, the boards will lock up the PCI bus by scanning against each other. The boards lock against each other by trying to access the PCI bus before clearing their configuration lock bit. Both boards end up in a loop, sending and receiving "Target Not Ready" messages forever. When running in PCI agent mode, the scanning now takes place after the boards have cleared their configuration lock bit. Also, add a missing declaration to the mpc83xx.h header file, fixing a build warning. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Size optimization of start.SRon Madrid2009-01-21-38/+39
| | | | | | | | | | | Currently there are in excess of 100 bytes located at the beginning of the image built by start.S that are not being utilized. This patch moves a few functions into this part of the image. This will create a greater number of *available* bytes that can be used by board specific code in NAND builds and will decrease the size of the assembled code in other builds. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Update U-Boot's build timestamp on every compilePeter Tyser2008-12-06-1/+2
| | | | | | | Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-0/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-1/+19
| | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-10-30-1/+1
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| * mpc83xx pci: Round up memory size in inbound window.Scott Wood2008-10-30-1/+1
| | | | | | | | | | | | | | | | The current calculation will fail to cover all memory if its size is not a power of two. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Make Freescale local bus registers available for both 83xx and 85xx.Haiying Wang2008-10-29-1/+1
|/ | | | | | | | | | | | | - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it can be shared by both 83xx and 85xx - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards files which use lbus83xx_t. - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that 85xx can share them. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig functionRichard Retanubun2008-10-21-5/+0
| | | | | | | | This is done to allow other 83XX based platforms which also have UPM (e.g. 8360) to configure and use their UPM in u-boot. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: serdes: add forgotten shifts for rfcksAnton Vorontsov2008-10-21-1/+1
| | | | | | | | | | The rfcks should be shifted by 28 bits left. We didn't notice the bug because we were using only 100MHz clocks (for which rfcks == 0). Though, for SGMII we'll need 125MHz clocks. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Cleanup: fix "MHz" spellingWolfgang Denk2008-10-21-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Use strmhz() to format clock frequenciesWolfgang Denk2008-10-21-20/+22
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge 'next' branchWolfgang Denk2008-10-18-283/+284
|\ | | | | | | | | | | | | | | | | Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-282/+282
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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