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* Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-5/+0
| | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: replace elaborate boottime verbosity with 'clocks' commandKim Phillips2007-05-01-5/+13
| | | | | | and fix CPU: to align with Board: display text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: minor fixups for 8313rdb introductionKim Phillips2007-04-25-0/+1
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* mpc83xx: Add generic PCI setup code.Scott Wood2007-04-23-1/+192
| | | | | | | | Board code can now request the generic setup code rather than having to copy-and-paste it for themselves. Boards should be converted to use this once they're tested with it. Signed-off-by: Scott Wood <scottwood@freescale.com>
* mpc83xx: Add 831x support to speed.c.Scott Wood2007-04-23-26/+42
| | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().Scott Wood2007-04-23-4/+17
| | | | | | | | | Rather than misleadingly define PVR_83xx as the specific type of 83xx being built for, the PVR of each core revision is defined. checkcpu() now prints the core that it detects, rather than aborting if it doesn't find what it thinks it wants. Signed-off-by: Scott Wood <scottwood@freescale.com>
* mpc83xx: Recognize SPR values for MPC8311 and MPC8313.Scott Wood2007-04-23-0/+12
| | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge git://www.denx.de/git/u-bootKim Phillips2007-04-23-1/+183
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| * Fix the ft_cpu_setup() property settings.Gerald Van Baren2007-04-15-54/+135
| | | | | | | | | | | | Use "setter" functions instead of flags, cleaner and more flexible. It also fixes the problem noted by Timur Tabi that the ethernet MAC addresses were all being set incorrectly to the same MAC address.
| * Moved fdt command support code to fdt_support.cGerald Van Baren2007-04-06-0/+1
| | | | | | | | | | ...in preparation for improving the bootm command's handling of fdt blobs. Also cleaned up some coding sloppiness.
| * Fix some minor whitespace violations.Gerald Van Baren2007-03-31-2/+2
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| * Add a flattened device tree (fdt) command (2 of 2)Gerald Van Baren2007-03-31-1/+101
| | | | | | | | Modifications to the existing code to support the new fdt command.
* | Fix two bugs for MPC83xx DDR2 controller SPD InitXie Xiaobo2007-04-12-3/+3
|/ | | | | | | | There are a few bugs in the cpu/mpc83xx/spd_sdram.c the first bug is that the picos_to_clk routine introduces a huge rounding error in 83xx. the second bug is that the mode register write recovery field is tWR-1, not tWR >> 1.
* mpc83xx: Fix config of Arbiter, System Priority, and Clock ModeKumar Gala2007-03-02-6/+28
| | | | | | | | | | | | | | | | | | | | | | | | | The config value for: * CFG_ACR_PIPE_DEP * CFG_ACR_RPTCNT * CFG_SPCR_TSEC1EP * CFG_SPCR_TSEC2EP * CFG_SCCR_TSEC1CM * CFG_SCCR_TSEC2CM Were not being used when setting the appropriate register Added: * CFG_SCCR_USBMPHCM * CFG_SCCR_USBDRCM * CFG_SCCR_PCICM * CFG_SCCR_ENCCM To allow full config of the SCCR. Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349 that were just bogus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc83xx: update [local-]mac-address properties on UEC based devicesKim Phillips2007-03-02-0/+40
| | | | | | | 8360 and 832x weren't updating their [local-]mac-address properties. This patch fixes that. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: write MAC address to mac-address and local-mac-addressTimur Tabi2007-03-02-0/+8
| | | | | | | | | Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, this patch updates ftp_cpu_setup() to write the MAC address to mac-address if it exists. This function already updates local-mac-address. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xxXie Xiaobo2007-03-02-61/+323
| | | | | | | The code supply fixed and SPD initialization for MPC83xx DDR2 Controller. it pass DDR/DDR2 compliance tests. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
* mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDSXie Xiaobo2007-03-02-0/+2
| | | | | | | MPC8360E rev2.0 have new spridr,and PVR value, The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
* mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDSXie Xiaobo2007-03-02-3/+14
| | | | | | | MPC8349E rev3.1 have new spridr,and PVR value, The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
* mpc83xx: don't hang if watchdog configured on 8360, 832xKim Phillips2007-03-02-4/+0
| | | | | | | don't hang if watchdog configured on 8360, 832x The watchdog programming model is the same across all 83xx devices; make the code reflect that.
* mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dtKim Phillips2007-03-02-0/+2
| | | | protect memcpy to bad address if a local-mac-address is missing from dt
* mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X insteadKumar Gala2007-03-02-5/+5
| | | | | | | | The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all MPC834X class processors. Change the protections from CONFIG_MPC8349 to CONFIG_MPC834X so they are more generic. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc83xx: U-Boot support for Wind River SBC8349Paul Gortmaker2007-03-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | I've redone the SBC8349 support to match git-current, which incorporates all the MPC834x updates from Freescale since the 1.1.6 release, including the DDR changes. I've kept all the SBC8349 files as parallel as possible to the MPC8349EMDS ones for ease of maintenance and to allow for easy inspection of what was changed to support this board. Hence the SBC8349 U-Boot has FDT support and everything else that the MPC8349EMDS has. Fortunately the Freescale updates added support for boards using CS0, but I had to change spd_sdram.c to allow for board specific settings for the sdram_clk_cntl (it is/was hard coded to zero, and that remains the default if the board doesn't specify a value.) Hopefully this should be mergeable as-is and require no whitespace cleanups or similar, but if something doesn't measure up then let me know and I'll fix it. Thanks, Paul.
* mpc83xx: Put the version (and magic) after the HRCW.Jerry Van Baren2007-03-02-12/+16
| | | | | | | Put the version (and magic) after the HRCW. This puts it in a fixed location in flash, not at the start of flash but as close as we can get. Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
* mpc83xx: Add support for the MPC832XEMDS boardDave Liu2007-03-02-16/+44
| | | | | | This patch supports DUART, ETH3/4 and PCI etc. Signed-off-by: Dave Liu <daveliu@freescale.com>
* mpc83xx: streamline the 83xx immr head fileDave Liu2007-03-02-12/+12
| | | | | | | | | | | | | | | | For better format and style, I streamlined the 83xx head files, including immap_83xx.h and mpc83xx.h. In the old head files, 1) duplicated macro definition appear in the both files; 2) the structure of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The macro definition put inside the each structure. So, I cleaned up the structure of QE immr from immap_83xx.h, deleted the duplicated stuff and moved the macro definition to mpc83xx.h, Just like MPC8260. CHANGELOG *streamline the 83xx immr head file Signed-off-by: Dave Liu <daveliu@freescale.com>
* Code cleanup.Wolfgang Denk2006-11-30-10/+10
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* mpc83xx: Miscellaneous code style fixesTimur Tabi2006-11-28-87/+32
| | | | | | Implement various code style fixes and similar changes. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Update 83xx to use fsl_i2c.cTimur Tabi2006-11-03-426/+3
| | | | | | | | Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files. Added multiple I2C bus support to fsl_i2c.c. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi2006-11-03-21/+21
| | | | | | | Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Lindent and clean up cpu/mpc83xx/speed.cKim Phillips2006-11-03-79/+82
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* mpc83xx: Fix the incorrect dcbz operationDave Liu2006-11-03-34/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 834x rev1.x silicon has one CPU5 errata. The issue is when the data cache locked with HID0[DLOCK], the dcbz instruction looks like no-op inst. The right behavior of the data cache is when the data cache Locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The 834x rev3.0 and later and 8360 have not this bug inside. So, when 834x rev3.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.x can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running on fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * Fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Otherwise, it will corrupt the stack in cache, The processor will checkstop reset. Signed-off-by: Dave Liu <daveliu@freescale.com>
* mpc83xx: change ft code to modify local-mac-address propertyKim Phillips2006-11-03-2/+2
| | | | | Update 83xx OF code to update local-mac-address properties for ethernet instead of the obsolete 'address' property.
* mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and ↵Timur Tabi2006-11-03-84/+130
| | | | | | | | | MPC8360EMDS This patch also adds an improved I2C set_speed(), which handles all clock frequencies. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: add QE ethernet supportDave Liu2006-11-03-7/+120
| | | | this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
* mpc83xx: Add MPC8360EMDS basic board supportDave Liu2006-11-03-258/+309
| | | | | Add support for the Freescale MPC8360EMDS board. Includes DDR, DUART, Local Bus, PCI.
* mpc83xx: Add support for the MPC8349E-mITXTimur Tabi2006-11-03-3/+130
| | | | | | | | | | | | | | | | | | | PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006090742000024 "Add support for multiple I2C buses" 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x" 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c" 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems" 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems" CHANGELOG: * Add support for the Freescale MPC8349E-mITX reference design platform. The second TSEC (Vitesse 7385 switch) is not supported at this time. Signed-off-by: Timur Tabi <timur@freescale.com>
* Multi-bus I2C implementation of MPC834xBen Warren2006-11-03-24/+144
| | | | | | | | | | | | | | | | | | | | | Hello, Attached is a patch implementing multiple I2C buses on the MPC834x CPU family and the MPC8349EMDS board in particular. This patch requires Patch 1 (Add support for multiple I2C buses). Testing was performed on a 533MHz board. /*** Note: This patch replaces ticket DNX#2006083042000027 ***/ Signed-off-by: Ben Warren <bwarren@qstreams.com> CHANGELOG: Implemented driver-level code to support two I2C buses on the MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds are 50kHz, 100kHz and 400kHz on each bus. regards, Ben
* mpc83xx: Add support for Errata DDR6 on MPC 834x systemsTimur Tabi2006-11-03-1/+42
| | | | | | | | | | CHANGELOG: * Errata DDR6, which affects all current MPC 834x processors, lists changes required to maintain compatibility with various types of DDR memory. This patch implements those changes. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Add support for variable flash memory sizes on 83xx systemsTimur Tabi2006-11-03-8/+21
| | | | | | | | | CHANGELOG: * On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access window registers, instead of using a hard-coded value of 8MB. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Changed to unified mpx83xx names and added common 83xx changesDave Liu2006-11-03-131/+204
| | | | | | | Incorporated the common unified variable names and the changes in preparation for releasing mpc8360 patches. Signed-off-by: Dave Liu <daveliu@freescale.com>
* mpc83xx: Removed unused file resetvec.S for mpc83xx cpuTanya Jiang2006-11-03-7/+1
| | | | | | Removed unused file resetvec.S for mpc83xx cpu Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
* Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-1/+1
| | | | Based on patch by Mike Frysinger, 20 Jun 2006
* Coding style cleanupWolfgang Denk2006-10-09-1/+1
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* Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-16/+14
| | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:Kumar Gala2006-04-20-1/+1
| | | | | | | | | - Removed MPC8349ADS port - Added PCI support to MPC8349ADS - reworked memory map to allow mapping of all regions with BATs Patch by Kumar Gala 20 Apr 2006 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Some code cleanupWolfgang Denk2006-04-16-3/+3
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* GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-12/+10
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* Support for DDR with 32-data path. Addotional notes on injectingRafal Jaworowski2006-03-16-12/+49
| | | | multiple-bit errors.
* Add support for ECC DDR initialization on MPC83xx.Marian Balakowicz2006-03-14-22/+108
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