| Commit message (Collapse) | Author | Age | Lines |
|
|
|
| |
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Newer ColdFire processors family boot from address 0 instead of
0xFFnn_nnnn. When the boot flash base chip select is set at new
location instead of 0, an un-predictable error will occur if
there is an vector being trigger and refer it to an invalid
address or the vector table handler is not existed at address
0.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
|
|
|
|
|
|
|
| |
Provide parameter passing to uart_port_config(). Update port
configuration - un-mask it before enable the bits.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
|
|
|
|
|
|
|
| |
Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
|
|
|
|
|
|
|
|
| |
Remove individual CPU specific DSPI driver.
Add required feature for the common DSPI driver in cpu_init and
in platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
|
|
|
|
|
|
|
| |
Place FEC pin assignments in cpu_init.c from platform's
mii.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
| |
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
|
|
|
|
|
|
|
| |
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
|
|
|
|
|
| |
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Signed-off by: John Rigby <jrigby@freescale.com>
|
|
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
|