| Commit message (Collapse) | Author | Age | Lines |
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When initializing the core clocks, stick external memory into self-refresh.
This gains us a few cool things:
- support suspend-to-RAM with Linux
- reprogram clocks automatically when doing "go" on u-boot.bin in RAM
- make sure settings are stable before flashing new version
- finally fully unify initialize startup code path between LDR/non-LDR
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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If the board config does not specify an explicit EBIU_SDBCTL value, set it
up with sane values based on other configuration options.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Workaround anomaly 432:
The bfrom_SysControl() firmware function does not clear the SIC_IWR1
register before executing the PLL programming sequence. Therefore, any
interrupt enabled in the SIC_IWR1 register prior to the call to
bfrom_SysControl() can prematurely terminate the idle sequence required
for the PLL to relock properly. SIC_IWR0 is properly handled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Boot ROM uses EVT1 as the entry point so set that rather than having
to use a tiny jump block in the default EVT1 location.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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No need to skip a byte as the symbol table handles this.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The function is only used locally, so mark it static.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The jtag tstc operation was checking the hardware to see if data is
available from it (which is fine for the jtag getc operation), but the
higher layers need to know whether any data is available. Since we have
to read up to 4 bytes at a time from the hardware, the higher layers need
to know they can consume the cached bytes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Looks like the initcode updates fell out of order during my merges. The
patch that really fixes up this code is part of power-on overhaul and so
is too large for merging at this point. Instead, we can disable the code
as no currently in-tree board depends on it. The next merge window will
fix things up properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Previously, booting over the UART required the baud rate to be known ahead
of time. Using a bit of tricky simple math, we can calculate the new board
rate based on the old divisors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
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Newer Blackfin boot roms support using the fast SPI read command rather than
just the slow one. If the functionality is available, then use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some bits of the DDR MMRs should not be set. If they do, bad things may
happen (like random failures or hardware destruction).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Newer Blackfin's have an on-chip rom with a syscontrol() function that needs
to be used to properly program the memory and voltage settings as it will
include (possibly critical) factory tested bias values.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Take the cache flush functions from the kernel as they use hardware loops in
order to get optimal performance.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Start building all Blackfin boards with -ffunction-sections/-fdata-sections
and linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some devices have no UART device pulled out, so allow people to disable the
driver completely in favor of other methods (like JTAG-console).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin JTAG has the ability to pass data via a back-channel without
halting the processor. Utilize that channel to emulate a console.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Workaround fun new anomalies related to software reset of the processor.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we save the value of RETX at power on and then pass it on to the
kernel so that it can nicely debug a "double-fault-caused-a-reset" crash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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People often ask questions about the init process and when things go
from flash to relocated base, so clarify the comments a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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No need to set the SP register indirectly to the configured value when it
can be set directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than using a local custom memcpy function, just call the existing
optimized Blackfin version.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current Blackfin i2c driver does not work properly with certain devices
due to it breaking up transfers incorrectly. This is a rewrite of the
driver and relocates it to the newer place in the source tree.
Also remove duplicated I2C speed defines in Blackfin board configs and
disable I2C slave address usage since it isn't implemented.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Our dcache invalidate function doesn't just invalidate, it also flushes.
So rename the function accordingly and fix the dma_memcpy() function so it
doesn't inadvertently corrupt the data destination.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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All implementations of the functions i2c_reg_read() and
i2c_reg_write() are identical. We can save space and simplify the
code by converting these functions into inlines and putting them in
i2c.h.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Some Blackfin UARTs are read-to-clear while others are write-to-clear.
This can cause problems when we poll the LSR and then later try and handle
any errors detected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We should use the algorithm in the Linux kernel so that the UART divisor
calculation is more accurate. It also fixes problems on some picky UARTs
that have sampling anomalies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Having to decode hwerrcause/excause values is a pain, so automate it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we report RETI/IPEND correctly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The hang function already tells you to reboot, so no point in showing it
twice.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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