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* Blackfin: bump up default JTAG console timeoutVivi Li2009-06-15-1/+1
| | | | | | | | | | The debug tools that interface with the other side of the JTAG console got much slower when generalizing things, so bump up the default timeout value on the U-Boot side to cope. Hopefully at some point we can improve the debug tools to speed things back up. Signed-off-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Add support for Linux-like kallsysmsMike Frysinger2009-06-12-48/+5
| | | | | | | The kernel stores address<->symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix timer_init()/timer_reset()Graf Yang2009-05-19-2/+3
| | | | | | | | | | | | | The timer_init() function was not using the right csync instruction, nor was it doing it right after disabling the core timer. The timer_reset() function would reset the timestamp, but not the actual timer, so there was a common edge case where get_timer() return a jump of one timestamp (couple milliseconds) right after resetting. This caused many functions to improperly timeout right away. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: avoid get_sclk() with early serial debugMike Frysinger2009-05-06-5/+5
| | | | | | | | When the clock functions were changed to use cached values (and thereby avoiding expensive math functions), early serial debug broke because the baud programming is called before external memory is available. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix booting with older bootroms (no EVT1)Mike Frysinger2009-05-06-1/+11
| | | | | | | | | | | When dropping jump block support, the assumption was that all bootroms supported entry point redirection via the EVT1 register. Unfortunately, this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2 and older and BF561). No one really noticed earlier because these parts usually are booted by bypassing the bootrom entirely, and older BF533 parts are not supported at all (too many anomalies). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: recurse with early serial initcodeMike Frysinger2009-05-06-1/+1
| | | | | | | Make sure we recurse through serial_putc() rather than bang on the UART transmit register directly to avoid hardware overflows when using \n. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: audit UART for all known anomaliesMike Frysinger2009-04-06-2/+21
| | | | | | | There is no code change here, just new comments, but this keeps me from having to do another audit from scratch in the future. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add check for anomaly 05000362Mike Frysinger2009-04-06-0/+9
| | | | | | | | | | | | | | | DESCRIPTION: The column address width settings for banks 2 and 3 are misconnected in the SDRAM controller. Accesses to bank 2 will result in an error if the Column Address Width for bank 3 (EB3CAW ) is not set to be the same as that of bank 2. WORKAROUND: If using bank 2, make sure that banks 2 and 3 have the same column address width settings in the EBIU_SDBCTL register. This must be the case regardless of whether or not bank 3 is enabled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add comment about anomaly 05000430 avoidanceMike Frysinger2009-04-06-0/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add workaround for anomaly 05000242Mike Frysinger2009-04-06-1/+1
| | | | | | | | | | | | | DESCRIPTION: If the DF bit is set prior to a hardware reset, the PLL will continue to divide CLKIN by 2 after the hardware reset, but the DF bit itself will be cleared in the PLL_CTL register. WORKAROUND: Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by 2 after reset. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add workaround for anomaly 05000171Mike Frysinger2009-04-06-0/+4
| | | | | | | | | | | | | DESCRIPTION: The Boot ROM is executed at power up/reset and changes the value of the SICA_IWR registers from their default reset value of 0xFFFF, but does not restore them. WORKAROUND: User code should not rely on the default value of these registers. Set the desired values explicitly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: do not delay on output bytesMike Frysinger2009-04-02-4/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix crash when booting from external memoryMike Frysinger2009-04-02-0/+11
| | | | | | | | | When testing a u-boot binary that hasn't been booted from the bootrom, we have to make sure the bootstruct structure has sane storage space. If we don't, the initcode will crash when it tries to dereference an invalid pointer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: put memory into self-refresh before/after programming clocksMike Frysinger2009-03-23-82/+190
| | | | | | | | | | | When initializing the core clocks, stick external memory into self-refresh. This gains us a few cool things: - support suspend-to-RAM with Linux - reprogram clocks automatically when doing "go" on u-boot.bin in RAM - make sure settings are stable before flashing new version - finally fully unify initialize startup code path between LDR/non-LDR Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: do not program voltage regulator on parts that do not have oneMike Frysinger2009-03-23-3/+20
| | | | | | | Some newer Blackfins (like the BF51x) do not have an on-chip voltage regulator, so do not attempt to program the memory as if it does. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: setup a sane default EBIU_SDBCTL for SDRAM controllersMike Frysinger2009-03-23-0/+33
| | | | | | | If the board config does not specify an explicit EBIU_SDBCTL value, set it up with sane values based on other configuration options. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: handle reboot anomaly 432Mike Frysinger2009-03-23-0/+6
| | | | | | | | | | | Workaround anomaly 432: The bfrom_SysControl() firmware function does not clear the SIC_IWR1 register before executing the PLL programming sequence. Therefore, any interrupt enabled in the SIC_IWR1 register prior to the call to bfrom_SysControl() can prematurely terminate the idle sequence required for the PLL to relock properly. SIC_IWR0 is properly handled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: kill off LDR jump blockMike Frysinger2009-03-23-7/+5
| | | | | | | The Boot ROM uses EVT1 as the entry point so set that rather than having to use a tiny jump block in the default EVT1 location. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: simplify symbol_lookup() a bitMike Frysinger2009-03-23-1/+1
| | | | | | No need to skip a byte as the symbol table handles this. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: mark bfin_reset staticMike Frysinger2009-03-23-1/+1
| | | | | | The function is only used locally, so mark it static. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix jtag console tstcMike Frysinger2009-03-23-4/+11
| | | | | | | | | | The jtag tstc operation was checking the hardware to see if data is available from it (which is fine for the jtag getc operation), but the higher layers need to know whether any data is available. Since we have to read up to 4 bytes at a time from the hardware, the higher layers need to know they can consume the cached bytes as well. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: disable syscontrol code for nowMike Frysinger2009-02-21-0/+1
| | | | | | | | | | Looks like the initcode updates fell out of order during my merges. The patch that really fixes up this code is part of power-on overhaul and so is too large for merging at this point. Instead, we can disable the code as no currently in-tree board depends on it. The next merge window will fix things up properly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dynamically update UART speed when initializingMike Frysinger2009-02-05-91/+43
| | | | | | | | | Previously, booting over the UART required the baud rate to be known ahead of time. Using a bit of tricky simple math, we can calculate the new board rate based on the old divisors. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
* Blackfin: add support for fast SPI reads with Boot ROMMike Frysinger2009-02-05-8/+17
| | | | | | | Newer Blackfin boot roms support using the fast SPI read command rather than just the slow one. If the functionality is available, then use it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: check for reserved settings in DDR MMRsMike Frysinger2009-02-05-0/+7
| | | | | | | Some bits of the DDR MMRs should not be set. If they do, bad things may happen (like random failures or hardware destruction). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: set default voltage levels for BF538/BF539 partsMike Frysinger2009-02-05-0/+3
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: use on-chip syscontrol() rom function when availableMike Frysinger2009-02-05-22/+38
| | | | | | | | Newer Blackfin's have an on-chip rom with a syscontrol() function that needs to be used to properly program the memory and voltage settings as it will include (possibly critical) factory tested bias values. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: rewrite cache handling functionsMike Frysinger2009-02-02-46/+72
| | | | | | | Take the cache flush functions from the kernel as they use hardware loops in order to get optimal performance. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: enable --gc-sectionsMike Frysinger2009-02-02-0/+1
| | | | | | | Start building all Blackfin boards with -ffunction-sections/-fdata-sections and linking with --gc-sections. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dont check baud if it wont actually get usedMike Frysinger2009-02-02-1/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fixup misc warnings such as printf's and missing castsMike Frysinger2009-01-28-10/+11
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: allow serial console to be disabledMike Frysinger2009-01-28-0/+8
| | | | | | | Some devices have no UART device pulled out, so allow people to disable the driver completely in favor of other methods (like JTAG-console). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: support console-over-JTAGMike Frysinger2009-01-28-4/+130
| | | | | | | The Blackfin JTAG has the ability to pass data via a back-channel without halting the processor. Utilize that channel to emulate a console. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: handle new anomalies with resetMike Frysinger2009-01-28-5/+15
| | | | | | Workaround fun new anomalies related to software reset of the processor. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: pass RETX to LinuxMike Frysinger2009-01-28-0/+6
| | | | | | | Make sure we save the value of RETX at power on and then pass it on to the kernel so that it can nicely debug a "double-fault-caused-a-reset" crash. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: clarify relocation comment during initMike Frysinger2009-01-28-3/+7
| | | | | | | People often ask questions about the init process and when things go from flash to relocated base, so clarify the comments a bit. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: just set SP register directly during initMike Frysinger2009-01-28-3/+2
| | | | | | | No need to set the SP register indirectly to the configured value when it can be set directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add portmuxing for UARTs on the BF51xMike Frysinger2009-01-28-1/+10
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: respect CONFIG_CLKIN_HALFMike Frysinger2009-01-28-1/+1
| | | | | | | | As pointed out by Ivan Koryakovskiy, the initialization code was not actually respecting the CONFIG_CLKIN_HALF option when configuring the PLL_CTL register. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: use common memcpy routine during initMike Frysinger2009-01-28-21/+11
| | | | | | | Rather than using a local custom memcpy function, just call the existing optimized Blackfin version. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: overhaul i2c driverMike Frysinger2009-01-28-429/+1
| | | | | | | | | | | The current Blackfin i2c driver does not work properly with certain devices due to it breaking up transfers incorrectly. This is a rewrite of the driver and relocates it to the newer place in the source tree. Also remove duplicated I2C speed defines in Blackfin board configs and disable I2C slave address usage since it isn't implemented. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix dcache handling when doing dma memcpy'sMike Frysinger2009-01-28-2/+2
| | | | | | | | Our dcache invalidate function doesn't just invalidate, it also flushes. So rename the function accordingly and fix the dma_memcpy() function so it doesn't inadvertently corrupt the data destination. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: minimize time cache is turned off when replacing cplb entriesMike Frysinger2009-01-28-22/+9
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functionsTimur Tabi2008-12-15-16/+0
| | | | | | | | | | All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Blackfin: fix up UART status bit handlingMike Frysinger2008-10-23-12/+60
| | | | | | | | Some Blackfin UARTs are read-to-clear while others are write-to-clear. This can cause problems when we poll the LSR and then later try and handle any errors detected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: small cpu init optimization while setting interrupt maskMike Frysinger2008-10-23-5/+2
| | | | | | | Use the sti instruction to set the initial interrupt mask rather than banging on the core IMASK MMR to save both space and time. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: set initial stack correctly according to Blackfin ABIMike Frysinger2008-10-23-3/+3
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: make baud calculation more accurateMike Frysinger2008-10-23-4/+4
| | | | | | | | We should use the algorithm in the Linux kernel so that the UART divisor calculation is more accurate. It also fixes problems on some picky UARTs that have sampling anomalies. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: decode hwerrcause/excause when crashingMike Frysinger2008-10-23-2/+40
| | | | | | Having to decode hwerrcause/excause values is a pain, so automate it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix register dump messagesMike Frysinger2008-10-23-1/+5
| | | | | | Make sure we report RETI/IPEND correctly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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