| Commit message (Collapse) | Author | Age | Lines |
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People often ask questions about the init process and when things go
from flash to relocated base, so clarify the comments a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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No need to set the SP register indirectly to the configured value when it
can be set directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than using a local custom memcpy function, just call the existing
optimized Blackfin version.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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