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* at91: Introduction of at91sam9g10 SOC.Sedji Gaouaou2009-07-12-0/+1
| | | | | | | AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a faster clock speed: 266/133MHz. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
* at91: Introduction of at91sam9g45 SOC.Sedji Gaouaou2009-07-12-2/+187
| | | | | | | | | | | | AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. On the board you can find 2 USART, USB high speed, a 480*272 LG lcd, ethernet, gpio/joystick/buttons. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
* at91: Add CAN init functionDaniel Gorsulowski2009-07-06-0/+30
| | | | | | | | | To enable CAN init, CONFIG_CAN has to be defined in the board config file and at91_can_hw_init() has to be called in the board specific code. CAN is available on AT91SAM9263 and AT91CAP9 SoC. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
* at91: unify nor boot supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-2/+284
| | | | | | the lowlevel init sequence is the same so unify it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: move cpu info print to cpuJean-Christophe PLAGNIOL-VILLARD2009-06-12-5/+22
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: extract reset from timerJean-Christophe PLAGNIOL-VILLARD2009-06-12-15/+43
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: unify linker scriptJean-Christophe PLAGNIOL-VILLARD2009-06-12-58/+0
| | | | | | | | | | | | all arm boards except a few use the same cpu linker script so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* afeb9260: fix macb device initJean-Christophe PLAGNIOL-VILLARD2009-06-12-1/+1
| | | | | | uses PA10, PA11 for ETX2 and ETX3. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: regroup IP hw init in one file per socJean-Christophe PLAGNIOL-VILLARD2009-06-12-603/+338
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91/cpu.c: add missing Copyright & GPL headerJean-Christophe PLAGNIOL-VILLARD2009-06-10-0/+23
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Fix e-mail address of Gary Jennejohn.Detlev Zundel2009-05-15-1/+1
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* AFEB9260 network fixSergey Lapin2009-05-13-1/+1
| | | | | | | | AFEB9260 uses PA10, PA11 for ETX2 and ETX3. Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence, not 0. Signed-off-by: Sergey Lapin <slapin@ossfans.org>
* at91: remove lowlevel_init.SJean-Christophe PLAGNIOL-VILLARD2009-05-01-61/+2
| | | | | | | | | | | | lowlevel_init.S is not used any more so remove it. As consequence, we also don't have to generate u-boot.lds but can use a static version as before. This also fixes the out-of-tree build problem introduced with commit f0a2c7b4 "at91: add support for the PM9263 board" Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Update CHANGELOG; minor coding style cleanup.Wolfgang Denk2009-05-01-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* at91: fixed plla calc when no USB support is activeDaniel Gorsulowski2009-04-29-1/+1
| | | | | Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000Jean-Christophe PLAGNIOL-VILLARD2009-04-16-38/+44
| | | | | | | | The timer has been rewrote with a precision at ~0,18% Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: Sergey Lapin <slapin@ossfans.org> Tested-by: Eric BENARD <ebenard@free.fr>
* at91: add support for the PM9263 board of Ronetix GmbHIlko Iliev2009-04-16-4/+14
| | | | | | | | | | The PM9263 board is based on the AT91SAM9263-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9263.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: improve clock frameworkJean-Christophe PLAGNIOL-VILLARD2009-04-16-0/+218
| | | | | | calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: move dataflash spi driver to drivers/spiJean-Christophe PLAGNIOL-VILLARD2009-04-04-158/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-04-04-81/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: rename DATAFLASH_MMC_SELECT to CONFIG_DATAFLASH_MMC_SELECTJean-Christophe PLAGNIOL-VILLARD2009-04-04-0/+5
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: spi init add hardware chip select supportJean-Christophe PLAGNIOL-VILLARD2009-04-04-27/+136
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre2009-03-22-2/+7
| | | | | | | | | | | | | | AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: move common macb initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+174
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: move common usb host initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+36
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: move common led management to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+65
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: move common spi initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-5/+372
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9/at91cap: move common serial initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-1/+386
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* Fix new found CFG_Jean-Christophe PLAGNIOL-VILLARD2008-12-14-1/+1
| | | | | | | Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Remove redundant armv4 flag from arm926ejs compile flagsRemy Bohmer2008-12-06-1/+0
| | | | | | | Currently the arm926ejs tree has the armv4 option set during compilation. This flag does not belong here because a arm926 CPU is always a armv5 CPU. Signed-off-by: Remy Bohmer <linux@bohmer.net>
* AT91: Enable PLLB for USBStelian Pop2008-11-21-0/+18
| | | | | | | | | | | | | | | | | At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-1/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-7/+7
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()Ben Warren2008-09-02-36/+0
| | | | | | Removed at91sam9_eth_initialize() from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* at91: move arch-at91sam9 to arch-at91Jean-Christophe PLAGNIOL-VILLARD2008-08-12-0/+555
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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