| Commit message (Collapse) | Author | Age | Lines | |
|---|---|---|---|---|
| * | Bugfix in I2C initialisation on S3C2400. | Wolfgang Denk | 2006-06-16 | -1/+1 |
| | | | | | | | | | | If the bus is blocked because of a previously interrupted transfer, up to eleven clocks are generated on the I2CSCL line to complete the transfer and to free the bus. With this fix pin I2CSCL (PG6) is really configured as GPIO so the clock pulses are really generated. Patch by Martin Krause, 04 Apr 2006 | |||
| * | Patch by Steven Scholz, 16 Aug 2004: | wdenk | 2004-10-09 | -0/+447 |
| - Introducing the concept of SoCs "./cpu/$(CPU)/$(SOC)" - creating subdirs for SoCs ./cpu/arm920t/imx and ./cpu/arm920t/s3c24x0 - moving SoC specific code out of cpu/arm920t/ into cpu/arm920t/$(SOC)/ - moving drivers/s3c24x0_i2c.c and drivers/serial_imx.c out of drivers/ into cpu/arm920t/$(SOC)/ | ||||
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index : arm-boot/u-boot-imx.git | |
| U-boot NXP imx6 | git@iatec.biz |
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